| 0h |
16 |
MMCSD_CTL_CFG_SDMA_SYS_ADDR_LO |
0FA0 0000h |
| 2h |
16 |
MMCSD_CTL_CFG_SDMA_SYS_ADDR_HI |
0FA0 0002h |
| 4h |
16 |
MMCSD_CTL_CFG_BLOCK_SIZE |
0FA0 0004h |
| 6h |
16 |
MMCSD_CTL_CFG_BLOCK_COUNT |
0FA0 0006h |
| 8h |
16 |
MMCSD_CTL_CFG_ARGUMENT1_LO |
0FA0 0008h |
| Ah |
16 |
MMCSD_CTL_CFG_ARGUMENT1_HI |
0FA0 000Ah |
| Ch |
16 |
MMCSD_CTL_CFG_TRANSFER_MODE |
0FA0 000Ch |
| Eh |
16 |
MMCSD_CTL_CFG_COMMAND |
0FA0 000Eh |
| 10h |
16 |
MMCSD_CTL_CFG_RESPONSE |
0FA0 0010h |
| 20h |
32 |
MMCSD_CTL_CFG_DATA_PORT |
0FA0 0020h |
| 24h |
32 |
MMCSD_CTL_CFG_PRESENTSTATE |
0FA0 0024h |
| 28h |
8 |
MMCSD_CTL_CFG_HOST_CONTROL1 |
0FA0 0028h |
| 29h |
8 |
MMCSD_CTL_CFG_POWER_CONTROL |
0FA0 0029h |
| 2Ah |
8 |
MMCSD_CTL_CFG_BLOCK_GAP_CONTROL |
0FA0 002Ah |
| 2Bh |
8 |
MMCSD_CTL_CFG_WAKEUP_CONTROL |
0FA0 002Bh |
| 2Ch |
16 |
MMCSD_CTL_CFG_CLOCK_CONTROL |
0FA0 002Ch |
| 2Eh |
8 |
MMCSD_CTL_CFG_TIMEOUT_CONTROL |
0FA0 002Eh |
| 2Fh |
8 |
MMCSD_CTL_CFG_SOFTWARE_RESET |
0FA0 002Fh |
| 30h |
16 |
MMCSD_CTL_CFG_NORMAL_INTR_STS |
0FA0 0030h |
| 32h |
16 |
MMCSD_CTL_CFG_ERROR_INTR_STS |
0FA0 0032h |
| 34h |
16 |
MMCSD_CTL_CFG_NORMAL_INTR_STS_ENA |
0FA0 0034h |
| 36h |
16 |
MMCSD_CTL_CFG_ERROR_INTR_STS_ENA |
0FA0 0036h |
| 38h |
16 |
MMCSD_CTL_CFG_NORMAL_INTR_SIG_ENA |
0FA0 0038h |
| 3Ah |
16 |
MMCSD_CTL_CFG_ERROR_INTR_SIG_ENA |
0FA0 003Ah |
| 3Ch |
16 |
MMCSD_CTL_CFG_AUTOCMD_ERR_STS |
0FA0 003Ch |
| 3Eh |
16 |
MMCSD_CTL_CFG_HOST_CONTROL2 |
0FA0 003Eh |
| 40h |
64 |
MMCSD_CTL_CFG_CAPABILITIES |
0FA0 0040h |
| 48h |
64 |
MMCSD_CTL_CFG_MAX_CURRENT_CAP |
0FA0 0048h |
| 50h |
16 |
MMCSD_CTL_CFG_FORCE_EVNT_ACMD_ERR_STS |
0FA0 0050h |
| 52h |
16 |
MMCSD_CTL_CFG_FORCE_EVNT_ERR_INT_STS |
0FA0 0052h |
| 54h |
8 |
MMCSD_CTL_CFG_ADMA_ERR_STATUS |
0FA0 0054h |
| 58h |
64 |
MMCSD_CTL_CFG_ADMA_SYS_ADDRESS |
0FA0 0058h |
| 60h |
16 |
MMCSD_CTL_CFG_PRESET_VALUE0 |
0FA0 0060h |
| 62h |
16 |
MMCSD_CTL_CFG_PRESET_VALUE1 |
0FA0 0062h |
| 64h |
16 |
MMCSD_CTL_CFG_PRESET_VALUE2 |
0FA0 0064h |
| 66h |
16 |
MMCSD_CTL_CFG_PRESET_VALUE3 |
0FA0 0066h |
| 68h |
16 |
MMCSD_CTL_CFG_PRESET_VALUE4 |
0FA0 0068h |
| 6Ah |
16 |
MMCSD_CTL_CFG_PRESET_VALUE5 |
0FA0 006Ah |
| 6Ch |
16 |
MMCSD_CTL_CFG_PRESET_VALUE6 |
0FA0 006Ch |
| 6Eh |
16 |
MMCSD_CTL_CFG_PRESET_VALUE7 |
0FA0 006Eh |
| 72h |
16 |
MMCSD_CTL_CFG_PRESET_VALUE8 |
0FA0 0072h |
| 74h |
16 |
MMCSD_CTL_CFG_PRESET_VALUE10 |
0FA0 0074h |
| 78h |
64 |
MMCSD_CTL_CFG_ADMA3_DESC_ADDRESS |
0FA0 0078h |
| 80h |
16 |
MMCSD_CTL_CFG_UHS2_BLOCK_SIZE |
0FA0 0080h |
| 84h |
32 |
MMCSD_CTL_CFG_UHS2_BLOCK_COUNT |
0FA0 0084h |
| 88h |
8 |
MMCSD_CTL_CFG_UHS2_COMMAND_PKT |
0FA0 0088h |
| 9Ch |
16 |
MMCSD_CTL_CFG_UHS2_XFER_MODE |
0FA0 009Ch |
| 9Eh |
16 |
MMCSD_CTL_CFG_UHS2_COMMAND |
0FA0 009Eh |
| A0h |
8 |
MMCSD_CTL_CFG_UHS2_RESPONSE |
0FA0 00A0h |
| B4h |
8 |
MMCSD_CTL_CFG_UHS2_MESSAGE_SELECT |
0FA0 00B4h |
| B8h |
32 |
MMCSD_CTL_CFG_UHS2_MESSAGE |
0FA0 00B8h |
| BCh |
16 |
MMCSD_CTL_CFG_UHS2_DEVICE_INTR_STATUS |
0FA0 00BCh |
| BEh |
8 |
MMCSD_CTL_CFG_UHS2_DEVICE_SELECT |
0FA0 00BEh |
| BFh |
8 |
MMCSD_CTL_CFG_UHS2_DEVICE_INT_CODE |
0FA0 00BFh |
| C0h |
16 |
MMCSD_CTL_CFG_UHS2_SOFTWARE_RESET |
0FA0 00C0h |
| C2h |
16 |
MMCSD_CTL_CFG_UHS2_TIMER_CONTROL |
0FA0 00C2h |
| C4h |
32 |
MMCSD_CTL_CFG_UHS2_ERR_INTR_STS |
0FA0 00C4h |
| C8h |
32 |
MMCSD_CTL_CFG_UHS2_ERR_INTR_STS_ENA |
0FA0 00C8h |
| CCh |
32 |
MMCSD_CTL_CFG_UHS2_ERR_INTR_SIG_ENA |
0FA0 00CCh |
| E0h |
16 |
MMCSD_CTL_CFG_UHS2_SETTINGS_PTR |
0FA0 00E0h |
| E2h |
16 |
MMCSD_CTL_CFG_UHS2_CAPABILITIES_PTR |
0FA0 00E2h |
| E4h |
16 |
MMCSD_CTL_CFG_UHS2_TEST_PTR |
0FA0 00E4h |
| E6h |
16 |
MMCSD_CTL_CFG_SHARED_BUS_CTRL_PTR |
0FA0 00E6h |
| E8h |
16 |
MMCSD_CTL_CFG_VENDOR_SPECFIC_PTR |
0FA0 00E8h |
| F4h |
32 |
MMCSD_CTL_CFG_BOOT_TIMEOUT_CONTROL |
0FA0 00F4h |
| F8h |
32 |
MMCSD_CTL_CFG_VENDOR_REGISTER |
0FA0 00F8h |
| FCh |
16 |
MMCSD_CTL_CFG_SLOT_INT_STS |
0FA0 00FCh |
| FEh |
16 |
MMCSD_CTL_CFG_HOST_CONTROLLER_VER |
0FA0 00FEh |
| 100h |
32 |
MMCSD_CTL_CFG_UHS2_GEN_SETTINGS |
0FA0 0100h |
| 104h |
32 |
MMCSD_CTL_CFG_UHS2_PHY_SETTINGS |
0FA0 0104h |
| 108h |
64 |
MMCSD_CTL_CFG_UHS2_LNK_TRN_SETTINGS |
0FA0 0108h |
| 110h |
32 |
MMCSD_CTL_CFG_UHS2_GEN_CAP |
0FA0 0110h |
| 114h |
32 |
MMCSD_CTL_CFG_UHS2_PHY_CAP |
0FA0 0114h |
| 118h |
64 |
MMCSD_CTL_CFG_UHS2_LNK_TRN_CAP |
0FA0 0118h |
| 120h |
32 |
MMCSD_CTL_CFG_FORCE_UHSII_ERR_INT_STS |
0FA0 0120h |
| 200h |
32 |
MMCSD_CTL_CFG_CQ_VERSION |
0FA0 0200h |
| 204h |
32 |
MMCSD_CTL_CFG_CQ_CAPABILITIES |
0FA0 0204h |
| 208h |
32 |
MMCSD_CTL_CFG_CQ_CONFIG |
0FA0 0208h |
| 20Ch |
32 |
MMCSD_CTL_CFG_CQ_CONTROL |
0FA0 020Ch |
| 210h |
32 |
MMCSD_CTL_CFG_CQ_INTR_STS |
0FA0 0210h |
| 214h |
32 |
MMCSD_CTL_CFG_CQ_INTR_STS_ENA |
0FA0 0214h |
| 218h |
32 |
MMCSD_CTL_CFG_CQ_INTR_SIG_ENA |
0FA0 0218h |
| 21Ch |
32 |
MMCSD_CTL_CFG_CQ_INTR_COALESCING |
0FA0 021Ch |
| 220h |
32 |
MMCSD_CTL_CFG_CQ_TDL_BASE_ADDR |
0FA0 0220h |
| 224h |
32 |
MMCSD_CTL_CFG_CQ_TDL_BASE_ADDR_UPBITS |
0FA0 0224h |
| 228h |
32 |
MMCSD_CTL_CFG_CQ_TASK_DOOR_BELL |
0FA0 0228h |
| 22Ch |
32 |
MMCSD_CTL_CFG_CQ_TASK_COMP_NOTIF |
0FA0 022Ch |
| 230h |
32 |
MMCSD_CTL_CFG_CQ_DEV_QUEUE_STATUS |
0FA0 0230h |
| 234h |
32 |
MMCSD_CTL_CFG_CQ_DEV_PENDING_TASKS |
0FA0 0234h |
| 238h |
32 |
MMCSD_CTL_CFG_CQ_TASK_CLEAR |
0FA0 0238h |
| 240h |
32 |
MMCSD_CTL_CFG_CQ_SEND_STS_CONFIG1 |
0FA0 0240h |
| 244h |
32 |
MMCSD_CTL_CFG_CQ_SEND_STS_CONFIG2 |
0FA0 0244h |
| 248h |
32 |
MMCSD_CTL_CFG_CQ_DCMD_RESPONSE |
0FA0 0248h |
| 250h |
32 |
MMCSD_CTL_CFG_CQ_RESP_ERR_MASK |
0FA0 0250h |
| 254h |
32 |
MMCSD_CTL_CFG_CQ_TASK_ERR_INFO |
0FA0 0254h |
| 258h |
32 |
MMCSD_CTL_CFG_CQ_CMD_RESP_INDEX |
0FA0 0258h |
| 25Ch |
32 |
MMCSD_CTL_CFG_CQ_CMD_RESP_ARG |
0FA0 025Ch |
| 260h |
32 |
MMCSD_CTL_CFG_CQ_ERROR_TASK_ID |
0FA0 0260h |