SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
CBASS modules are the interconnection blocks on the SoC level to provide access path between initiators and targets. When the transaction is not completed successfully, an interrupt is generated by the CBASS and the error transaction is logged by the CBASS module.
There are multiple CBASS modules on the SoC level to provide three layers of interconnect: the data plane, security configuration plane and debug configuration plane. The CBASS access error from the security configuration plane is only routed to HSM, and the other CBASS access errors are aggregated before routing it to the processors, refer to Aggregated CBASS Access Error.
