SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
| Offset | Length | Register Name | C7X256V0_DEBUG Physical Address | C7X256V1_DEBUG Physical Address |
|---|---|---|---|---|
| 0h | 32 | THINMAN_REG_DBG_CAP | 0007 3400 0000h | 0007 3800 0000h |
| 4h | 32 | THINMAN_REG_DBG_PID | 0007 3400 0004h | 0007 3800 0004h |
| 10h | 32 | THINMAN_REG_DBG_CNTL | 0007 3400 0010h | 0007 3800 0010h |
| 14h | 32 | THINMAN_REG_DBG_STAT | 0007 3400 0014h | 0007 3800 0014h |
| 18h | 32 | THINMAN_REG_DBG_OWN | 0007 3400 0018h | 0007 3800 0018h |
| 20h | 32 | THINMAN_REG_DBG_INDRCT_CAP0 | 0007 3400 0020h | 0007 3800 0020h |
| 24h | 32 | THINMAN_REG_DBG_INDRCT_CAP1 | 0007 3400 0024h | 0007 3800 0024h |
| 30h | 32 | THINMAN_REG_DBG_INDRCT_CNTL | 0007 3400 0030h | 0007 3800 0030h |
| 34h | 32 | THINMAN_REG_DBG_INDRCT_CTXT0 | 0007 3400 0034h | 0007 3800 0034h |
| 38h | 32 | THINMAN_REG_DBG_INDRCT_CTXT1 | 0007 3400 0038h | 0007 3800 0038h |
| 3Ch | 32 | THINMAN_REG_DBG_INDRCT_CTXT2 | 0007 3400 003Ch | 0007 3800 003Ch |
| 40h | 32 | THINMAN_REG_DBG_INDRCT_ADDR0 | 0007 3400 0040h | 0007 3800 0040h |
| 44h | 32 | THINMAN_REG_DBG_INDRCT_ADDR1 | 0007 3400 0044h | 0007 3800 0044h |
| 48h | 32 | THINMAN_REG_DBG_INDRCT_DATA0 | 0007 3400 0048h | 0007 3800 0048h |
| 4Ch | 32 | THINMAN_REG_DBG_INDRCT_DATA1 | 0007 3400 004Ch | 0007 3800 004Ch |
| 100h | 32 | THINMAN_REG_DBG_HWBP_0_CNTL | 0007 3400 0100h | 0007 3800 0100h |
| 108h | 32 | THINMAN_REG_DBG_HWBP_0_CTXT0 | 0007 3400 0108h | 0007 3800 0108h |
| 10Ch | 32 | THINMAN_REG_DBG_HWBP_0_CTXT1 | 0007 3400 010Ch | 0007 3800 010Ch |
| 110h | 32 | THINMAN_REG_DBG_HWBP_0_CTXT2 | 0007 3400 0110h | 0007 3800 0110h |
| 118h | 32 | THINMAN_REG_DBG_HWBP_0_ADDR0 | 0007 3400 0118h | 0007 3800 0118h |
| 11Ch | 32 | THINMAN_REG_DBG_HWBP_0_ADDR1 | 0007 3400 011Ch | 0007 3800 011Ch |
| 120h | 32 | THINMAN_REG_DBG_HWBP_0_AMASK0 | 0007 3400 0120h | 0007 3800 0120h |
| 124h | 32 | THINMAN_REG_DBG_HWBP_0_AMASK1 | 0007 3400 0124h | 0007 3800 0124h |
| 180h | 32 | THINMAN_REG_DBG_HWBP_1_CNTL | 0007 3400 0180h | 0007 3800 0180h |
| 188h | 32 | THINMAN_REG_DBG_HWBP_1_CTXT0 | 0007 3400 0188h | 0007 3800 0188h |
| 18Ch | 32 | THINMAN_REG_DBG_HWBP_1_CTXT1 | 0007 3400 018Ch | 0007 3800 018Ch |
| 190h | 32 | THINMAN_REG_DBG_HWBP_1_CTXT2 | 0007 3400 0190h | 0007 3800 0190h |
| 198h | 32 | THINMAN_REG_DBG_HWBP_1_ADDR0 | 0007 3400 0198h | 0007 3800 0198h |
| 19Ch | 32 | THINMAN_REG_DBG_HWBP_1_ADDR1 | 0007 3400 019Ch | 0007 3800 019Ch |
| 1A0h | 32 | THINMAN_REG_DBG_HWBP_1_AMASK0 | 0007 3400 01A0h | 0007 3800 01A0h |
| 1A4h | 32 | THINMAN_REG_DBG_HWBP_1_AMASK1 | 0007 3400 01A4h | 0007 3800 01A4h |
| 200h | 32 | THINMAN_REG_DBG_HWBP_2_CNTL | 0007 3400 0200h | 0007 3800 0200h |
| 208h | 32 | THINMAN_REG_DBG_HWBP_2_CTXT0 | 0007 3400 0208h | 0007 3800 0208h |
| 20Ch | 32 | THINMAN_REG_DBG_HWBP_2_CTXT1 | 0007 3400 020Ch | 0007 3800 020Ch |
| 210h | 32 | THINMAN_REG_DBG_HWBP_2_CTXT2 | 0007 3400 0210h | 0007 3800 0210h |
| 218h | 32 | THINMAN_REG_DBG_HWBP_2_ADDR0 | 0007 3400 0218h | 0007 3800 0218h |
| 21Ch | 32 | THINMAN_REG_DBG_HWBP_2_ADDR1 | 0007 3400 021Ch | 0007 3800 021Ch |
| 220h | 32 | THINMAN_REG_DBG_HWBP_2_AMASK0 | 0007 3400 0220h | 0007 3800 0220h |
| 224h | 32 | THINMAN_REG_DBG_HWBP_2_AMASK1 | 0007 3400 0224h | 0007 3800 0224h |
| 280h | 32 | THINMAN_REG_DBG_HWBP_3_CNTL | 0007 3400 0280h | 0007 3800 0280h |
| 288h | 32 | THINMAN_REG_DBG_HWBP_3_CTXT0 | 0007 3400 0288h | 0007 3800 0288h |
| 28Ch | 32 | THINMAN_REG_DBG_HWBP_3_CTXT1 | 0007 3400 028Ch | 0007 3800 028Ch |
| 290h | 32 | THINMAN_REG_DBG_HWBP_3_CTXT2 | 0007 3400 0290h | 0007 3800 0290h |
| 298h | 32 | THINMAN_REG_DBG_HWBP_3_ADDR0 | 0007 3400 0298h | 0007 3800 0298h |
| 29Ch | 32 | THINMAN_REG_DBG_HWBP_3_ADDR1 | 0007 3400 029Ch | 0007 3800 029Ch |
| 2A0h | 32 | THINMAN_REG_DBG_HWBP_3_AMASK0 | 0007 3400 02A0h | 0007 3800 02A0h |
| 2A4h | 32 | THINMAN_REG_DBG_HWBP_3_AMASK1 | 0007 3400 02A4h | 0007 3800 02A4h |
| 300h | 32 | THINMAN_REG_DBG_HWWP_0_CNTL | 0007 3400 0300h | 0007 3800 0300h |
| 308h | 32 | THINMAN_REG_DBG_HWWP_0_CTXT0 | 0007 3400 0308h | 0007 3800 0308h |
| 30Ch | 32 | THINMAN_REG_DBG_HWWP_0_CTXT1 | 0007 3400 030Ch | 0007 3800 030Ch |
| 310h | 32 | THINMAN_REG_DBG_HWWP_0_CTXT2 | 0007 3400 0310h | 0007 3800 0310h |
| 318h | 32 | THINMAN_REG_DBG_HWWP_0_ADDR0 | 0007 3400 0318h | 0007 3800 0318h |
| 31Ch | 32 | THINMAN_REG_DBG_HWWP_0_ADDR1 | 0007 3400 031Ch | 0007 3800 031Ch |
| 320h | 32 | THINMAN_REG_DBG_HWWP_0_AMASK0 | 0007 3400 0320h | 0007 3800 0320h |
| 324h | 32 | THINMAN_REG_DBG_HWWP_0_AMASK1 | 0007 3400 0324h | 0007 3800 0324h |