SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
This register is not physically implemented, rather it is an address where Error Interrupt Status register can be written.
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| MMCSD0 | 0FA0 0052h |
| 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 |
| RESERVED | HOST | RESP | TUNING | ADMA | AUTO_CMD | ||
| NONE | W | W | W | W | W | ||
| 0h | 0h | 0h | 0h | 0h | 0h | ||
| 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 |
| CURR_LIM | DAT_ENDBIT | DAT_CRC | DAT_TIMEOUT | CMD_INDEX | CMD_ENDBIT | CMD_CRC | CMD_TIMEOUT |
| W | W | W | W | W | W | W | W |
| 0h | 0h | 0h | 0h | 0h | 0h | 0h | 0h |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15:13 | RESERVED | NONE | 0h | Reserved |
| 12 | HOST | W | 0h |
Force Event for Host Error
1 Interrupt is generated 0 No Interrupt |
| 11 | RESP | W | 0h |
Force Event for Response Error
1 Interrupt is generated 0 No Interrupt |
| 10 | TUNING | W | 0h |
Force Event for Tuning Error.
1 Interrupt is generated 0 No Interrupt |
| 9 | ADMA | W | 0h |
Force Event for ADMA Error.
1 Interrupt is generated 0 No Interrupt |
| 8 | AUTO_CMD | W | 0h |
Force Event for Auto CMD Error.
1 Interrupt is generated 0 No Interrupt |
| 7 | CURR_LIM | W | 0h |
Force Event for Current Limit Error.
1 Interrupt is generated 0 No Interrupt |
| 6 | DAT_ENDBIT | W | 0h |
Force Event for Data End Bit Error.
1 Interrupt is generated 0 No Interrupt |
| 5 | DAT_CRC | W | 0h |
Force Event for Data CRC Error.
1 Interrupt is generated 0 No Interrupt |
| 4 | DAT_TIMEOUT | W | 0h |
Force Event for Data Timeout Error.
1 Interrupt is generated 0 No Interrupt |
| 3 | CMD_INDEX | W | 0h |
Force Event for Command Index Error
1 Interrupt is generated 0 No Interrupt |
| 2 | CMD_ENDBIT | W | 0h |
Force Event for Command End Bit Error.
1 Interrupt is generated 0 No Interrupt |
| 1 | CMD_CRC | W | 0h |
Force Event for Command CRC Error.
1 Interrupt is generated 0 No Interrupt |
| 0 | CMD_TIMEOUT | W | 0h |
Force Event for CMD Timeout Error.
1 Interrupt is generated 0 No Interrupt |