SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
SMS0_HSM includes an Arm Cortex M4F with embedded debug capability, including:
A summary of the SMS0_HSM debug capabilities is detailed in teh following table
| Capability | Feature | Notes |
|---|---|---|
| Basic Debug | AHB-AP | AHB-AP provides access to resources |
| ROM table | Facilitates discovery of debug resources within AHB-AP address space | |
| Processor halt | Support user-requested entry into the suspended state | |
| Single step | Execution of a single instruction before entering the suspended state | |
| Core register access | Access to processor core registers | |
| Vector catch | Halting in response to an exception | |
| Software breakpoints | Software breakpoints are supported via opcode replacement | |
| System memory access | Access to M4F address space is supported via AHB-AP | |
|
Arm TrustZone debug authentication |
Provisioning for DBGEN and NIDEN | |
| Cross Triggering | Debug State |
Support for controlling execution state (run, halt) via triggers and creating triggers upon entry into debug state |
| ETM |
Six ETM external triggers (One ETMTRIG output, two EXTIN inputs, 3 ETMTRIGGER outputs) |
|
| DWT | Watchpoints | Four comparators implemented that can be configured to support watchpoints, data address trace, ETM signaling and PC sampling |
| Data address trace | ||
| ETM signaling | ||
| PC sampling trace | ||
| Cycle count matching | ||
| Performance counting |
Profiling counter support provides visibility into instruction cycle count, exception overhead, sleep overhead, load-store overhead, and folded instruction count |
|
| FPB | Hardware breakpoints | Six instruction address comparators support hardware breakpoints |
|
Remapping of literal and instruction fetch accesses |
Two comparators support address remapping of literal or instruction accesses to facilitate software patching |
|
| ITM | Software trace |
Software writes to ITM stimulus registers provoke the generation of trace packets that convey the values written |
| DWT hardware trace | Support for conveying DWT output using trace | |
| Timestamping | Support for attaching a local timestamp to trace traffic | |
| Global timestamping | Support for attaching a global timestamp to trace traffic | |
| ETM | Program execution trace | Support for tracing instruction execution |
| Global timestamping | Support for attaching a global timestamp to trace traffic |