SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
RTI Interrupt Flag Register
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| Instance Name | Physical Address |
|---|---|
| SMS0_RTI_1 | 4393 5088h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | OVL1INT | OVL0INT | TBINT | ||||
| NONE | R/W1TC | R/W1TC | R/W1TC | ||||
| 0h | 0h | 0h | 0h | ||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | INT3 | INT2 | INT1 | INT0 | |||
| NONE | R/W1TC | R/W1TC | R/W1TC | R/W1TC | |||
| 0h | 0h | 0h | 0h | 0h | |||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:19 | RESERVED | NONE | 0h | Reserved |
| 18 | OVL1INT | R/W1TC | 0h | User and privilege mode (read): determines if an interrupt is pending 0 = no interrupt pending 1 = interrupt pending Privilege mode (write): 0 = leaves the bit unchanged 1 = set the bit to 0 Reset Source: sms_custom_rst_mod_g_rst_n |
| 17 | OVL0INT | R/W1TC | 0h | User and privilege mode (read): determines if an interrupt is pending 0 = no interrupt pending 1 = interrupt pending Privilege mode (write): 0 = leaves the bit unchanged 1 = set the bit to 0 Reset Source: sms_custom_rst_mod_g_rst_n |
| 16 | TBINT | R/W1TC | 0h | User and privilege mode (read): this flag is set when the TBEXT bit is cleared by detection of a missing external clockedge. It will not be set by clearing TBEXT by software. determines if an interrupt is pending 0 = no interrupt pending 1 = interrupt pending Privilege mode (write): 0 = leaves the bit unchanged 1 = set the bit to 0 Reset Source: sms_custom_rst_mod_g_rst_n |
| 15:4 | RESERVED | NONE | 0h | Reserved |
| 3 | INT3 | R/W1TC | 0h | User and privilege mode (read): determines if a interrupt is pending 0 = no interrupt pending 1 = interrupt pending Privilege mode (write): 0 = leaves the bit unchanged 1 = set the bit to 0 Reset Source: sms_custom_rst_mod_g_rst_n |
| 2 | INT2 | R/W1TC | 0h | User and privilege mode (read): determines if a interrupt is pending 0 = no interrupt pending 1 = interrupt pending Privilege mode (write): 0 = leaves the bit unchanged 1 = set the bit to 0 Reset Source: sms_custom_rst_mod_g_rst_n |
| 1 | INT1 | R/W1TC | 0h | User and privilege mode (read): determines if a interrupt is pending 0 = no interrupt pending 1 = interrupt pending Privilege mode (write): 0 = leaves the bit unchanged 1 = set the bit to 0 Reset Source: sms_custom_rst_mod_g_rst_n |
| 0 | INT0 | R/W1TC | 0h | User and privilege mode (read): determines if a interrupt is pending 0 = no interrupt pending 1 = interrupt pending Privilege mode (write): 0 = leaves the bit unchanged 1 = set the bit to 0 Reset Source: sms_custom_rst_mod_g_rst_n |