SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
| Offset | Length | Register Name | MMCSD0 Physical Address |
|---|---|---|---|
| 0h | 32 | MMCSD_ECC_AGGR_TXMEM_REV | 0070 9000h |
| 8h | 32 | MMCSD_ECC_AGGR_TXMEM_VECTOR | 0070 9008h |
| Ch | 32 | MMCSD_ECC_AGGR_TXMEM_STAT | 0070 900Ch |
| 10h | 32 | MMCSD_ECC_AGGR_TXMEM_RESERVED_SVBUS | 0070 9010h |
| 3Ch | 32 | MMCSD_ECC_AGGR_TXMEM_SEC_EOI_REG | 0070 903Ch |
| 40h | 32 | MMCSD_ECC_AGGR_TXMEM_SEC_STATUS_REG0 | 0070 9040h |
| 80h | 32 | MMCSD_ECC_AGGR_TXMEM_SEC_ENABLE_SET_REG0 | 0070 9080h |
| C0h | 32 | MMCSD_ECC_AGGR_TXMEM_SEC_ENABLE_CLR_REG0 | 0070 90C0h |
| 13Ch | 32 | MMCSD_ECC_AGGR_TXMEM_DED_EOI_REG | 0070 913Ch |
| 140h | 32 | MMCSD_ECC_AGGR_TXMEM_DED_STATUS_REG0 | 0070 9140h |
| 180h | 32 | MMCSD_ECC_AGGR_TXMEM_DED_ENABLE_SET_REG0 | 0070 9180h |
| 1C0h | 32 | MMCSD_ECC_AGGR_TXMEM_DED_ENABLE_CLR_REG0 | 0070 91C0h |
| 200h | 32 | MMCSD_ECC_AGGR_TXMEM_AGGR_ENABLE_SET | 0070 9200h |
| 204h | 32 | MMCSD_ECC_AGGR_TXMEM_AGGR_ENABLE_CLR | 0070 9204h |
| 208h | 32 | MMCSD_ECC_AGGR_TXMEM_AGGR_STATUS_SET | 0070 9208h |
| 20Ch | 32 | MMCSD_ECC_AGGR_TXMEM_AGGR_STATUS_CLR | 0070 920Ch |