| FSS0 |
FSS0_ecc_corr_level_0 |
ESM0_esm_lvl_event_IN_145 |
ESM0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_ecc_uncorr_level_0 |
ESM0_esm_lvl_event_IN_146 |
ESM0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_ecc_intr_err_pend_0 |
C7X256V0_CLEC_gic_spi_IN_170 |
C7X256V0_CLEC |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_ecc_intr_err_pend_0 |
C7X256V1_CLEC_gic_spi_IN_170 |
C7X256V1_CLEC |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_ecc_intr_err_pend_0 |
ESM0_esm_lvl_event_IN_141 |
ESM0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_ecc_intr_err_pend_0 |
R5FSS0_CORE0_intr_IN_182 |
R5FSS0_CORE0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_ecc_intr_err_pend_0 |
R5FSS0_CORE1_intr_IN_182 |
R5FSS0_CORE1 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_ecc_intr_err_pend_0 |
R5FSS1_CORE0_intr_IN_182 |
R5FSS1_CORE0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_ecc_intr_err_pend_0 |
R5FSS1_CORE1_intr_IN_182 |
R5FSS1_CORE1 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_ecc_intr_err_pend_0 |
WKUP_R5FSS0_CORE0_intr_IN_182 |
WKUP_R5FSS0_CORE0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_fota_stat_err_pend_0 |
C7X256V0_CLEC_gic_spi_IN_173 |
C7X256V0_CLEC |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_fota_stat_err_pend_0 |
C7X256V1_CLEC_gic_spi_IN_173 |
C7X256V1_CLEC |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_fota_stat_err_pend_0 |
R5FSS0_CORE0_intr_IN_173 |
R5FSS0_CORE0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_fota_stat_err_pend_0 |
R5FSS0_CORE1_intr_IN_173 |
R5FSS0_CORE1 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_fota_stat_err_pend_0 |
R5FSS1_CORE0_intr_IN_173 |
R5FSS1_CORE0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_fota_stat_err_pend_0 |
R5FSS1_CORE1_intr_IN_173 |
R5FSS1_CORE1 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_fota_stat_err_pend_0 |
WKUP_R5FSS0_CORE0_intr_IN_173 |
WKUP_R5FSS0_CORE0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_fota_stat_intr_pend_0 |
C7X256V0_CLEC_gic_spi_IN_172 |
C7X256V0_CLEC |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_fota_stat_intr_pend_0 |
C7X256V1_CLEC_gic_spi_IN_172 |
C7X256V1_CLEC |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_fota_stat_intr_pend_0 |
R5FSS0_CORE0_intr_IN_172 |
R5FSS0_CORE0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_fota_stat_intr_pend_0 |
R5FSS0_CORE1_intr_IN_172 |
R5FSS0_CORE1 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_fota_stat_intr_pend_0 |
R5FSS1_CORE0_intr_IN_172 |
R5FSS1_CORE0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_fota_stat_intr_pend_0 |
R5FSS1_CORE1_intr_IN_172 |
R5FSS1_CORE1 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_fsas_fota_stat_intr_pend_0 |
WKUP_R5FSS0_CORE0_intr_IN_172 |
WKUP_R5FSS0_CORE0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_ospi0_ecc_corr_lvl_intr_0 |
ESM0_esm_lvl_event_IN_11 |
ESM0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_ospi0_ecc_uncorr_lvl_intr_0 |
ESM0_esm_lvl_event_IN_74 |
ESM0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_ospi0_lvl_intr_0 |
C7X256V0_CLEC_gic_spi_IN_171 |
C7X256V0_CLEC |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_ospi0_lvl_intr_0 |
C7X256V1_CLEC_gic_spi_IN_171 |
C7X256V1_CLEC |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_ospi0_lvl_intr_0 |
R5FSS0_CORE0_intr_IN_171 |
R5FSS0_CORE0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_ospi0_lvl_intr_0 |
R5FSS0_CORE1_intr_IN_171 |
R5FSS0_CORE1 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_ospi0_lvl_intr_0 |
R5FSS1_CORE0_intr_IN_171 |
R5FSS1_CORE0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_ospi0_lvl_intr_0 |
R5FSS1_CORE1_intr_IN_171 |
R5FSS1_CORE1 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_ospi0_lvl_intr_0 |
WKUP_R5FSS0_CORE0_intr_IN_171 |
WKUP_R5FSS0_CORE0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_otfa_intr_err_pend_0 |
C7X256V0_CLEC_gic_spi_IN_174 |
C7X256V0_CLEC |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_otfa_intr_err_pend_0 |
C7X256V1_CLEC_gic_spi_IN_174 |
C7X256V1_CLEC |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_otfa_intr_err_pend_0 |
R5FSS0_CORE0_intr_IN_174 |
R5FSS0_CORE0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_otfa_intr_err_pend_0 |
R5FSS0_CORE1_intr_IN_174 |
R5FSS0_CORE1 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_otfa_intr_err_pend_0 |
R5FSS1_CORE0_intr_IN_174 |
R5FSS1_CORE0 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_otfa_intr_err_pend_0 |
R5FSS1_CORE1_intr_IN_174 |
R5FSS1_CORE1 |
FSS0 interrupt request |
level |
| FSS0 |
FSS0_otfa_intr_err_pend_0 |
WKUP_R5FSS0_CORE0_intr_IN_174 |
WKUP_R5FSS0_CORE0 |
FSS0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_ecc_intr_err_pend_0 |
C7X256V0_CLEC_gic_spi_IN_169 |
C7X256V0_CLEC |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_ecc_intr_err_pend_0 |
C7X256V1_CLEC_gic_spi_IN_169 |
C7X256V1_CLEC |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_ecc_intr_err_pend_0 |
ESM0_esm_lvl_event_IN_142 |
ESM0 |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_ecc_intr_err_pend_0 |
R5FSS0_CORE0_intr_IN_181 |
R5FSS0_CORE0 |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_ecc_intr_err_pend_0 |
R5FSS0_CORE1_intr_IN_181 |
R5FSS0_CORE1 |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_ecc_intr_err_pend_0 |
R5FSS1_CORE0_intr_IN_181 |
R5FSS1_CORE0 |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_ecc_intr_err_pend_0 |
R5FSS1_CORE1_intr_IN_181 |
R5FSS1_CORE1 |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_ecc_intr_err_pend_0 |
WKUP_R5FSS0_CORE0_intr_IN_181 |
WKUP_R5FSS0_CORE0 |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_otfa_intr_err_pend_0 |
C7X256V0_CLEC_gic_spi_IN_175 |
C7X256V0_CLEC |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_otfa_intr_err_pend_0 |
C7X256V1_CLEC_gic_spi_IN_175 |
C7X256V1_CLEC |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_otfa_intr_err_pend_0 |
R5FSS0_CORE0_intr_IN_180 |
R5FSS0_CORE0 |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_otfa_intr_err_pend_0 |
R5FSS0_CORE1_intr_IN_180 |
R5FSS0_CORE1 |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_otfa_intr_err_pend_0 |
R5FSS1_CORE0_intr_IN_180 |
R5FSS1_CORE0 |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_otfa_intr_err_pend_0 |
R5FSS1_CORE1_intr_IN_180 |
R5FSS1_CORE1 |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_FSAS_0 |
FSS1_FSAS_0_otfa_intr_err_pend_0 |
WKUP_R5FSS0_CORE0_intr_IN_180 |
WKUP_R5FSS0_CORE0 |
FSS1_FSAS_0 interrupt request |
level |
| FSS1_HYPERBUS1P0_0 |
FSS1_HYPERBUS1P0_0_hpb_intr_0 |
C7X256V0_CLEC_gic_spi_IN_179 |
C7X256V0_CLEC |
FSS1_HYPERBUS1P0_0 interrupt request |
level |
| FSS1_HYPERBUS1P0_0 |
FSS1_HYPERBUS1P0_0_hpb_intr_0 |
C7X256V1_CLEC_gic_spi_IN_179 |
C7X256V1_CLEC |
FSS1_HYPERBUS1P0_0 interrupt request |
level |
| FSS1_HYPERBUS1P0_0 |
FSS1_HYPERBUS1P0_0_hpb_intr_0 |
R5FSS0_CORE0_intr_IN_179 |
R5FSS0_CORE0 |
FSS1_HYPERBUS1P0_0 interrupt request |
level |
| FSS1_HYPERBUS1P0_0 |
FSS1_HYPERBUS1P0_0_hpb_intr_0 |
R5FSS0_CORE1_intr_IN_179 |
R5FSS0_CORE1 |
FSS1_HYPERBUS1P0_0 interrupt request |
level |
| FSS1_HYPERBUS1P0_0 |
FSS1_HYPERBUS1P0_0_hpb_intr_0 |
R5FSS1_CORE0_intr_IN_179 |
R5FSS1_CORE0 |
FSS1_HYPERBUS1P0_0 interrupt request |
level |
| FSS1_HYPERBUS1P0_0 |
FSS1_HYPERBUS1P0_0_hpb_intr_0 |
R5FSS1_CORE1_intr_IN_179 |
R5FSS1_CORE1 |
FSS1_HYPERBUS1P0_0 interrupt request |
level |
| FSS1_HYPERBUS1P0_0 |
FSS1_HYPERBUS1P0_0_hpb_intr_0 |
WKUP_R5FSS0_CORE0_intr_IN_179 |
WKUP_R5FSS0_CORE0 |
FSS1_HYPERBUS1P0_0 interrupt request |
level |
| FSS1_OSPI_0 |
FSS1_OSPI_0_ospi_lvl_intr_0 |
C7X256V0_CLEC_gic_spi_IN_178 |
C7X256V0_CLEC |
FSS1_OSPI_0 interrupt request |
level |
| FSS1_OSPI_0 |
FSS1_OSPI_0_ospi_lvl_intr_0 |
C7X256V1_CLEC_gic_spi_IN_178 |
C7X256V1_CLEC |
FSS1_OSPI_0 interrupt request |
level |
| FSS1_OSPI_0 |
FSS1_OSPI_0_ospi_lvl_intr_0 |
R5FSS0_CORE0_intr_IN_178 |
R5FSS0_CORE0 |
FSS1_OSPI_0 interrupt request |
level |
| FSS1_OSPI_0 |
FSS1_OSPI_0_ospi_lvl_intr_0 |
R5FSS0_CORE1_intr_IN_178 |
R5FSS0_CORE1 |
FSS1_OSPI_0 interrupt request |
level |
| FSS1_OSPI_0 |
FSS1_OSPI_0_ospi_lvl_intr_0 |
R5FSS1_CORE0_intr_IN_178 |
R5FSS1_CORE0 |
FSS1_OSPI_0 interrupt request |
level |
| FSS1_OSPI_0 |
FSS1_OSPI_0_ospi_lvl_intr_0 |
R5FSS1_CORE1_intr_IN_178 |
R5FSS1_CORE1 |
FSS1_OSPI_0 interrupt request |
level |
| FSS1_OSPI_0 |
FSS1_OSPI_0_ospi_lvl_intr_0 |
WKUP_R5FSS0_CORE0_intr_IN_178 |
WKUP_R5FSS0_CORE0 |
FSS1_OSPI_0 interrupt request |
level |
| FSS1_OSPI_ECC_AGGR_0 |
FSS1_OSPI_ECC_AGGR_0_ospi_ecc_corr_lvl_intr_0 |
ESM0_esm_lvl_event_IN_12 |
ESM0 |
FSS1_OSPI_ECC_AGGR_0 interrupt request |
level |
| FSS1_OSPI_ECC_AGGR_0 |
FSS1_OSPI_ECC_AGGR_0_ospi_ecc_uncorr_lvl_intr_0 |
ESM0_esm_lvl_event_IN_75 |
ESM0 |
FSS1_OSPI_ECC_AGGR_0 interrupt request |
level |