SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The auto clock gating feature of WKUP domain peripherals is enabled by default for all expected for the CBA_NOGATE bits that have the default value of 0x1.
The disabling of auto clock gating may result in improved performance.
The auto clock gating control can be modified during device initialization time through registers CLKGATE_CTRL0 and CLKGATE_CTRL1 in the WKUP_CTRL_MMR and CLKGATE_CTRL regsiter in the MCU_CTRL_MMR.