SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The AXI L2 port of each R5F core integrates a Fast Local Copy (FLC) engine to accelerate boot up. Reducing boot time of R5F is essential to achieve 50ms CAN response.
The FLC engine is designed to leverage how application execution from internal SRAM is significantly faster than execution from external flash. A typical boot process involves critical application code getting copied over from flash to SRAM before executing from SRAM. The copy phase of this process results in increased boot time.
With the FLC engine, boot up is accelerated by redirecting the core access to flash when the copy is in progress and redirecting the access to SRAM when the content is in valid in SRAM. This enables core to execute immediately without waiting for the copy to complete. The operation is transparent to core.
The FLC supports the following features: