| R5FSS0_CORE0 |
R5FSS0_CORE0_cti_0 |
R5FSS0_CORE0_intr_IN_175 |
R5FSS0_CORE0 |
R5FSS0_CORE0 interrupt request |
level |
| R5FSS0_CORE0 |
R5FSS0_CORE0_cti_0 |
R5FSS0_CORE1_intr_IN_175 |
R5FSS0_CORE1 |
R5FSS0_CORE0 interrupt request |
level |
| R5FSS0_CORE0 |
R5FSS0_CORE0_exp_intr_0 |
ESM0_esm_lvl_event_IN_210 |
ESM0 |
R5FSS0_CORE0 interrupt request |
level |
| R5FSS0_CORE0 |
R5FSS0_CORE0_exp_intr_0 |
R5FSS0_CORE0_intr_IN_4 |
R5FSS0_CORE0 |
R5FSS0_CORE0 interrupt request |
level |
| R5FSS0_CORE0 |
R5FSS0_CORE0_pmu_0 |
R5FSS0_CORE0_intr_IN_94 |
R5FSS0_CORE0 |
R5FSS0_CORE0 interrupt request |
level |
| R5FSS0_CORE0 |
R5FSS0_CORE0_pmu_0 |
R5FSS0_CORE1_intr_IN_94 |
R5FSS0_CORE1 |
R5FSS0_CORE0 interrupt request |
level |
| R5FSS0_CORE0 |
R5FSS0_CORE0_valfiq_0 |
R5FSS0_CORE0_intr_IN_95 |
R5FSS0_CORE0 |
R5FSS0_CORE0 interrupt request |
level |
| R5FSS0_CORE0 |
R5FSS0_CORE0_valirq_0 |
R5FSS0_CORE0_intr_IN_96 |
R5FSS0_CORE0 |
R5FSS0_CORE0 interrupt request |
level |
| R5FSS0_CORE1 |
R5FSS0_CORE1_cti_0 |
R5FSS0_CORE0_intr_IN_176 |
R5FSS0_CORE0 |
R5FSS0_CORE1 interrupt request |
level |
| R5FSS0_CORE1 |
R5FSS0_CORE1_cti_0 |
R5FSS0_CORE1_intr_IN_176 |
R5FSS0_CORE1 |
R5FSS0_CORE1 interrupt request |
level |
| R5FSS0_CORE1 |
R5FSS0_CORE1_exp_intr_0 |
ESM0_esm_lvl_event_IN_6 |
ESM0 |
R5FSS0_CORE1 interrupt request |
level |
| R5FSS0_CORE1 |
R5FSS0_CORE1_exp_intr_0 |
R5FSS0_CORE1_intr_IN_4 |
R5FSS0_CORE1 |
R5FSS0_CORE1 interrupt request |
level |
| R5FSS0_CORE1 |
R5FSS0_CORE1_pmu_0 |
R5FSS0_CORE0_intr_IN_93 |
R5FSS0_CORE0 |
R5FSS0_CORE1 interrupt request |
level |
| R5FSS0_CORE1 |
R5FSS0_CORE1_pmu_0 |
R5FSS0_CORE1_intr_IN_93 |
R5FSS0_CORE1 |
R5FSS0_CORE1 interrupt request |
level |
| R5FSS0_CORE1 |
R5FSS0_CORE1_valfiq_0 |
R5FSS0_CORE1_intr_IN_95 |
R5FSS0_CORE1 |
R5FSS0_CORE1 interrupt request |
level |
| R5FSS0_CORE1 |
R5FSS0_CORE1_valirq_0 |
R5FSS0_CORE1_intr_IN_96 |
R5FSS0_CORE1 |
R5FSS0_CORE1 interrupt request |
level |
| R5FSS1_CORE0 |
R5FSS1_CORE0_cti_0 |
R5FSS1_CORE1_intr_IN_175 |
R5FSS1_CORE1 |
R5FSS1_CORE0 interrupt request |
level |
| R5FSS1_CORE0 |
R5FSS1_CORE0_exp_intr_0 |
ESM0_esm_lvl_event_IN_126 |
ESM0 |
R5FSS1_CORE0 interrupt request |
level |
| R5FSS1_CORE0 |
R5FSS1_CORE0_exp_intr_0 |
R5FSS1_CORE0_intr_IN_4 |
R5FSS1_CORE0 |
R5FSS1_CORE0 interrupt request |
level |
| R5FSS1_CORE0 |
R5FSS1_CORE0_pmu_0 |
R5FSS1_CORE0_intr_IN_94 |
R5FSS1_CORE0 |
R5FSS1_CORE0 interrupt request |
level |
| R5FSS1_CORE0 |
R5FSS1_CORE0_pmu_0 |
R5FSS1_CORE1_intr_IN_94 |
R5FSS1_CORE1 |
R5FSS1_CORE0 interrupt request |
level |
| R5FSS1_CORE0 |
R5FSS1_CORE0_valfiq_0 |
R5FSS1_CORE0_intr_IN_95 |
R5FSS1_CORE0 |
R5FSS1_CORE0 interrupt request |
level |
| R5FSS1_CORE0 |
R5FSS1_CORE0_valirq_0 |
R5FSS1_CORE0_intr_IN_96 |
R5FSS1_CORE0 |
R5FSS1_CORE0 interrupt request |
level |
| R5FSS1_CORE1 |
R5FSS1_CORE1_cti_0 |
R5FSS1_CORE0_intr_IN_176 |
R5FSS1_CORE0 |
R5FSS1_CORE1 interrupt request |
level |
| R5FSS1_CORE1 |
R5FSS1_CORE1_cti_0 |
R5FSS1_CORE1_intr_IN_176 |
R5FSS1_CORE1 |
R5FSS1_CORE1 interrupt request |
level |
| R5FSS1_CORE1 |
R5FSS1_CORE1_exp_intr_0 |
ESM0_esm_lvl_event_IN_127 |
ESM0 |
R5FSS1_CORE1 interrupt request |
level |
| R5FSS1_CORE1 |
R5FSS1_CORE1_exp_intr_0 |
R5FSS1_CORE1_intr_IN_4 |
R5FSS1_CORE1 |
R5FSS1_CORE1 interrupt request |
level |
| R5FSS1_CORE1 |
R5FSS1_CORE1_pmu_0 |
R5FSS1_CORE0_intr_IN_93 |
R5FSS1_CORE0 |
R5FSS1_CORE1 interrupt request |
level |
| R5FSS1_CORE1 |
R5FSS1_CORE1_pmu_0 |
R5FSS1_CORE1_intr_IN_93 |
R5FSS1_CORE1 |
R5FSS1_CORE1 interrupt request |
level |
| R5FSS1_CORE1 |
R5FSS1_CORE1_valfiq_0 |
R5FSS1_CORE1_intr_IN_95 |
R5FSS1_CORE1 |
R5FSS1_CORE1 interrupt request |
level |
| R5FSS1_CORE1 |
R5FSS1_CORE1_valirq_0 |
R5FSS1_CORE1_intr_IN_96 |
R5FSS1_CORE1 |
R5FSS1_CORE1 interrupt request |
level |
| WKUP_R5FSS0 |
WKUP_R5FSS0_CORE0_ecc_corrected_level_0 |
ESM0_esm_lvl_event_IN_30 |
ESM0 |
WKUP_R5FSS0 interrupt request |
level |
| WKUP_R5FSS0 |
WKUP_R5FSS0_CORE0_ecc_uncorrected_level_0 |
ESM0_esm_lvl_event_IN_91 |
ESM0 |
WKUP_R5FSS0 interrupt request |
level |
| WKUP_R5FSS0 |
WKUP_R5FSS0_CORE0_exp_intr_0 |
ESM0_esm_lvl_event_IN_124 |
ESM0 |
WKUP_R5FSS0 interrupt request |
level |
| WKUP_R5FSS0 |
WKUP_R5FSS0_CORE0_exp_intr_0 |
WKUP_R5FSS0_CORE0_intr_IN_4 |
WKUP_R5FSS0_CORE0 |
WKUP_R5FSS interrupt request |
level |
| WKUP_R5FSS0 |
WKUP_R5FSS0_CORE0_pmu_0 |
WKUP_R5FSS0_CORE0_intr_IN_58 |
WKUP_R5FSS0_CORE0 |
WKUP_R5FSS0 interrupt request |
level |
| WKUP_R5FSS0 |
WKUP_R5FSS0_CORE0_valfiq_0 |
WKUP_R5FSS0_CORE0_intr_IN_59 |
WKUP_R5FSS0_CORE0 |
WKUP_R5FSS0 interrupt request |
level |
| WKUP_R5FSS0 |
WKUP_R5FSS0_CORE0_valirq_0 |
WKUP_R5FSS0_CORE0_intr_IN_60 |
WKUP_R5FSS0_CORE0 |
WKUP_R5FSS0 interrupt request |
level |
| WKUP_R5FSS0 |
WKUP_R5FSS0_CORE0_cti_0 |
WKUP_R5FSS0_CORE0_intr_IN_175 |
WKUP_R5FSS0_CORE0 |
WKUP_R5FSS0_CORE0 interrupt request |
level |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_bus_monitor_err_pulse_0 |
ESM0_esm_pls_event0_IN_229 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
pulse |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_bus_monitor_err_pulse_0 |
ESM0_esm_pls_event1_IN_229 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
pulse |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_bus_monitor_err_pulse_0 |
ESM0_esm_pls_event2_IN_229 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
pulse |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_commrx_level_0_0 |
R5FSS0_CORE0_intr_IN_5 |
R5FSS0_CORE0 |
R5FSS0_COMMON0 interrupt request |
level |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_commrx_level_1_0 |
R5FSS0_CORE1_intr_IN_5 |
R5FSS0_CORE1 |
R5FSS0_COMMON0 interrupt request |
level |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_commtx_level_0_0 |
R5FSS0_CORE0_intr_IN_6 |
R5FSS0_CORE0 |
R5FSS0_COMMON0 interrupt request |
level |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_commtx_level_1_0 |
R5FSS0_CORE1_intr_IN_6 |
R5FSS0_CORE1 |
R5FSS0_COMMON0 interrupt request |
level |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_compare_err_pulse_0 |
ESM0_esm_pls_event0_IN_231 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
pulse |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_compare_err_pulse_0 |
ESM0_esm_pls_event1_IN_231 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
pulse |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_compare_err_pulse_0 |
ESM0_esm_pls_event2_IN_231 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
pulse |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_ecc_de_to_esm_0_0 |
ESM0_esm_lvl_event_IN_211 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
level |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_ecc_de_to_esm_1_0 |
ESM0_esm_lvl_event_IN_221 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
level |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_ecc_se_to_esm_0_0 |
ESM0_esm_lvl_event_IN_212 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
level |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_ecc_se_to_esm_1_0 |
ESM0_esm_lvl_event_IN_222 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
level |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_selftest_err_pulse_0 |
ESM0_esm_pls_event0_IN_232 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
pulse |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_selftest_err_pulse_0 |
ESM0_esm_pls_event1_IN_232 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
pulse |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_selftest_err_pulse_0 |
ESM0_esm_pls_event2_IN_232 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
pulse |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_vim_compare_err_pulse_0 |
ESM0_esm_pls_event0_IN_233 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
pulse |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_vim_compare_err_pulse_0 |
ESM0_esm_pls_event1_IN_233 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
pulse |
| R5FSS0_COMMON0 |
R5FSS0_COMMON0_vim_compare_err_pulse_0 |
ESM0_esm_pls_event2_IN_233 |
ESM0 |
R5FSS0_COMMON0 interrupt request |
pulse |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_bus_monitor_err_pulse_0 |
ESM0_esm_pls_event0_IN_235 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
pulse |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_bus_monitor_err_pulse_0 |
ESM0_esm_pls_event1_IN_235 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
pulse |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_bus_monitor_err_pulse_0 |
ESM0_esm_pls_event2_IN_235 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
pulse |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_commrx_level_0_0 |
R5FSS1_CORE0_intr_IN_5 |
R5FSS1_CORE0 |
R5FSS1_COMMON0 interrupt request |
level |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_commrx_level_1_0 |
R5FSS1_CORE1_intr_IN_5 |
R5FSS1_CORE1 |
R5FSS1_COMMON0 interrupt request |
level |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_commtx_level_0_0 |
R5FSS1_CORE0_intr_IN_6 |
R5FSS1_CORE0 |
R5FSS1_COMMON0 interrupt request |
level |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_commtx_level_1_0 |
R5FSS1_CORE1_intr_IN_6 |
R5FSS1_CORE1 |
R5FSS1_COMMON0 interrupt request |
level |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_compare_err_pulse_0 |
ESM0_esm_pls_event0_IN_237 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
pulse |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_compare_err_pulse_0 |
ESM0_esm_pls_event1_IN_237 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
pulse |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_compare_err_pulse_0 |
ESM0_esm_pls_event2_IN_237 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
pulse |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_ecc_de_to_esm_0_0 |
ESM0_esm_lvl_event_IN_46 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
level |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_ecc_de_to_esm_1_0 |
ESM0_esm_lvl_event_IN_47 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
level |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_ecc_se_to_esm_0_0 |
ESM0_esm_lvl_event_IN_48 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
level |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_ecc_se_to_esm_1_0 |
ESM0_esm_lvl_event_IN_49 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
level |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_selftest_err_pulse_0 |
ESM0_esm_pls_event0_IN_238 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
pulse |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_selftest_err_pulse_0 |
ESM0_esm_pls_event1_IN_238 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
pulse |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_selftest_err_pulse_0 |
ESM0_esm_pls_event2_IN_238 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
pulse |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_vim_compare_err_pulse_0 |
ESM0_esm_pls_event0_IN_239 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
pulse |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_vim_compare_err_pulse_0 |
ESM0_esm_pls_event1_IN_239 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
pulse |
| R5FSS1_COMMON0 |
R5FSS1_COMMON0_vim_compare_err_pulse_0 |
ESM0_esm_pls_event2_IN_239 |
ESM0 |
R5FSS1_COMMON0 interrupt request |
pulse |
| WKUP_R5FSS0_COMMON0 |
WKUP_R5FSS0_COMMON0_commrx_level_0_0 |
WKUP_R5FSS0_CORE0_intr_IN_5 |
WKUP_R5FSS0_CORE0 |
WKUP_R5FSS0_COMMON0 interrupt request |
level |
| WKUP_R5FSS0_COMMON0 |
WKUP_R5FSS0_COMMON0_commtx_level_0_0 |
WKUP_R5FSS0_CORE0_intr_IN_6 |
WKUP_R5FSS0_CORE0 |
WKUP_R5FSS0_COMMON0 interrupt request |
level |
| WKUP_R5FSS0_COMMON0 |
WKUP_R5FSS0_COMMON0_ecc_de_to_esm_0_0 |
ESM0_esm_lvl_event_IN_40 |
ESM0 |
WKUP_R5FSS0_COMMON0 interrupt request |
level |
| WKUP_R5FSS0_COMMON0 |
WKUP_R5FSS0_COMMON0_ecc_se_to_esm_0_0 |
ESM0_esm_lvl_event_IN_41 |
ESM0 |
WKUP_R5FSS0_COMMON0 interrupt request |
level |