SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
This section describes the MLBSS external connections (environment).
Figure 12-46 shows the MLBSS associated signals available on device pads.
Figure 12-46 MLBSS Subsystem EnvironmentTable 12-44 describes the MLBSS I/O signals used in both 3-pin and 6-pin modes.
| Device Level Signal | I/O(1) | Description |
|---|---|---|
| 6-pin mode | ||
| MLB0_MLBSP | I/O | Differential pair signal line |
| MLB0_MLBSN | I/O | |
| MLB0_MLBDP | I/O | Differential pair data line |
| MLB0_MLBDN | I/O | |
| MLB0_MLBCP | I | Differential pair clock line |
| MLB0_MLBCN | I | |
| 3-pin mode | ||
| MLB0_MLBSIG | I/O | Single ended signal line |
| MLB0_MLBDAT | I/O | Single ended data line |
| MLB0_MLBCLK | I | Single ended clock line |
For more information about device level signals (pull-up/down resistors, buffer type, multiplexing and others), see tables Pin Attributes and Pin Multiplexing in the device-specific Datasheet.