SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
| Offset | Length | Register Name | C7X256V0_ECC_AGGR Physical Address | C7X256V1_ECC_AGGR Physical Address |
|---|---|---|---|---|
| 0h | 32 | ECC_AGGR_REV | 0071 A000h | 0071 B000h |
| 8h | 32 | ECC_AGGR_VECTOR | 0071 A008h | 0071 B008h |
| Ch | 32 | ECC_AGGR_STAT | 0071 A00Ch | 0071 B00Ch |
| 10h | 32 | ECC_AGGR_RESERVED_SVBUS_J | 0071 A010h + formula | 0071 B010h + formula |
| 3Ch | 32 | ECC_AGGR_SEC_EOI_REG | 0071 A03Ch | 0071 B03Ch |
| 40h | 32 | ECC_AGGR_SEC_STATUS_REG0 | 0071 A040h | 0071 B040h |
| 80h | 32 | ECC_AGGR_SEC_ENABLE_SET_REG0 | 0071 A080h | 0071 B080h |
| C0h | 32 | ECC_AGGR_SEC_ENABLE_CLR_REG0 | 0071 A0C0h | 0071 B0C0h |
| 13Ch | 32 | ECC_AGGR_DED_EOI_REG | 0071 A13Ch | 0071 B13Ch |
| 140h | 32 | ECC_AGGR_DED_STATUS_REG0 | 0071 A140h | 0071 B140h |
| 180h | 32 | ECC_AGGR_DED_ENABLE_SET_REG0 | 0071 A180h | 0071 B180h |
| 1C0h | 32 | ECC_AGGR_DED_ENABLE_CLR_REG0 | 0071 A1C0h | 0071 B1C0h |
| 200h | 32 | ECC_AGGR_AGGR_ENABLE_SET | 0071 A200h | 0071 B200h |
| 204h | 32 | ECC_AGGR_AGGR_ENABLE_CLR | 0071 A204h | 0071 B204h |
| 208h | 32 | ECC_AGGR_AGGR_STATUS_SET | 0071 A208h | 0071 B208h |
| 20Ch | 32 | ECC_AGGR_AGGR_STATUS_CLR | 0071 A20Ch | 0071 B20Ch |