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SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1

14.7.3.2.2.27 USB2SS_USB2SS_CFG_OVERRIDE_CONFIG Register

2.2.27.1 USB2SS_USB2SS_CFG_OVERRIDE_CONFIG Register (Offset = 38h) [reset = 0h]

Register containing various overrides

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Table 14-12689 Instance Table

Instance Name	Physical Address
USB0	0F90 0038h

Figure 14-6277 USB2SS_USB2SS_CFG_OVERRIDE_CONFIG Name Register

31	30	29	28	27	26	25	24
PHY_HVM_EN	RESERVED
R/W	NONE
0h	0h
23	22	21	20	19	18	17	16
RESERVED							XCVRSEL_HVM_OVERRIDE_VAL
NONE							R/W
0h							0h
15	14	13	12	11	10	9	8
XCVRSEL_HVM_OVERRIDE_VAL	TERMSEL_HVM_OVERRIDE_VAL	OPMODE_HVM_OVERRIDE_VAL		DMPULLDOWN_HVM_OVERRIDE_VAL	DPPULLDOWN_HVM_OVERRIDE_VAL	RESERVED
R/W	R/W	R/W		R/W	R/W	NONE
0h	0h	0h		0h	0h	0h
7	6	5	4	3	2	1	0
SUSPEND_OVERRIDE_VAL	SUSPEND_OVERRIDE_SEL	TXBITSTUFFEN_OVERRIDE_VAL	TXBITSTUFFEN_OVERRIDE_SEL	SESSVALID_OVERRIDE_VAL	SESSVALID_OVERRIDE_SEL	VBUSVALID_OVERRIDE_VAL	VBUSVALID_OVERRIDE_SEL
R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
0h	0h	0h	0h	0h	0h	0h	0h

Table 14-12690 USB2SS_USB2SS_CFG_OVERRIDE_CONFIG Register Field Descriptions

Bit	Field	Type	Reset	Description
31	PHY_HVM_EN	R/W	0h	Enable PHY HVM overrides. Reset Source: cfg_srst_n
30:17	RESERVED	NONE	0h	Reserved
16:15	XCVRSEL_HVM_OVERRIDE_VAL	R/W	0h	Override value for PHY xcvr input. The value in this field is applied to PHY xcvrsel input if phy_hvm_en bit in this register is set. Reset Source: cfg_srst_n
14	TERMSEL_HVM_OVERRIDE_VAL	R/W	0h	Override value for PHY termsel input. The value in this field is applied to PHY termsel input if phy_hvm_en bit in this register is set. Reset Source: cfg_srst_n
13:12	OPMODE_HVM_OVERRIDE_VAL	R/W	0h	Override value for PHY opmode input. The value in this field is applied to PHY opmode input if phy_hvm_en bit in this register is set. Reset Source: cfg_srst_n
11	DMPULLDOWN_HVM_OVERRIDE_VAL	R/W	0h	Override value for PHY dmpulldown input. The value in this field is applied to PHY dmpulldown input if phy_hvm_en bit in this register is set. Reset Source: cfg_srst_n
10	DPPULLDOWN_HVM_OVERRIDE_VAL	R/W	0h	Override value for PHY dppulldown input. The value in this field is applied to PHY dppulldown input if phy_hvm_en bit in this register is set. Reset Source: cfg_srst_n
9:8	RESERVED	NONE	0h	Reserved
7	SUSPEND_OVERRIDE_VAL	R/W	0h	Suspend override value. 0 - suspendm is asserted and clockstop idle term indicates idle, 1 - suspendm is deasserted and clockstop idle term indicates non-idle. Reset Source: cfg_srst_n
6	SUSPEND_OVERRIDE_SEL	R/W	0h	Suspend override selector. This has to be set to override utmi_suspend_n from Controller that goes to clockstop idle. This does not affect suspend going to PHY. Only purpose of this is to ease clockstop interface DV. Reset Source: cfg_srst_n
5	TXBITSTUFFEN_OVERRIDE_VAL	R/W	0h	TXBITSTUFFENABLE override value Reset Source: cfg_srst_n
4	TXBITSTUFFEN_OVERRIDE_SEL	R/W	0h	TXBITSTUFFENABLE override selector. This has to be set to override TXBITSTUFFENABLE to PHY. Reset Source: cfg_srst_n
3	SESSVALID_OVERRIDE_VAL	R/W	0h	SESSVALID override value. 1 - Session is valid, 0 - Session is not valid Reset Source: cfg_srst_n
2	SESSVALID_OVERRIDE_SEL	R/W	0h	SESSVALID override selector. This has to be set to override sessvalid from PHY to Controller. Reset Source: cfg_srst_n
1	VBUSVALID_OVERRIDE_VAL	R/W	0h	VBUSVALID override value. 1 - VBUS is valid, 0 - VBUS is not valid Reset Source: cfg_srst_n
0	VBUSVALID_OVERRIDE_SEL	R/W	0h	VBUSVALID override selector. This has to be set to override vbusvalid from PHY to Controller. Reset Source: cfg_srst_n