SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
64-bit mode operation is identical to 32-bit mode except that all 64-bits of the TIMESTAMP are used (CPSW3_CPSW_NU_CPTS_EVENT_0_REG and CPSW3_CPSW_NU_CPTS_EVENT_3_REG). In 32-bit mode only the lower 32-bits (CPSW3_CPSW_NU_CPTS_EVENT_0_REG) are used.
Figure 12-159 CPTS_COMP Output in Toggle and Non-Toggle Mode