SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
End of Interrupt Register
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| Instance Name | Physical Address |
|---|---|
| MCAN0 | 2070 0020h |
| MCAN1 | 2071 0020h |
| MCAN2 | 2072 0020h |
| MCAN3 | 2073 0020h |
| MCAN4 | 2074 0020h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| EOI | |||||||
| W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:8 | RESERVED | NONE | 0h | Reserved |
| 7:0 | EOI | W | 0h | End Of Interrupt Write with bit position of the targeted interrupt (example: external timestamp is bit 0). Upon write, level interrupt will clear and if unserviced interrupt counter > 1h will issue another pulse interrupt. 0h EOI value for external timestamp interrupt 1h EOI value for mcan[0] interrupt 2h EOI value for mcan[1] interrupt |