SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The RL2 has Memory just outside the module for tag information that is SETs deep and WAYs times WAY info wide. This memory start auto initialization when a write to the rl2_regs_ctrl.size field occurs that changes the current size, or the rl2_regs_ctrl.enable bit is changed from a '0' to a '1' and all pending operations have completed. The RL2 performs any correctable ECC writeback in the event ECC is enables and a single error correct occurs. The memory is not used until the rl2_regs_ctrl.size field is written and the enable bit is set.
The tag memory auto initialization preloads the LRU info into each way of all the defined sets.