SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Peripheral ID
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| TIMER0 | 0240 0000h |
| TIMER1 | 0241 0000h |
| TIMER2 | 0242 0000h |
| TIMER3 | 0243 0000h |
| TIMER4 | 0244 0000h |
| TIMER5 | 0245 0000h |
| TIMER6 | 0246 0000h |
| TIMER7 | 0247 0000h |
| TIMER8 | 0248 0000h |
| TIMER9 | 0249 0000h |
| TIMER10 | 024A 0000h |
| TIMER11 | 024B 0000h |
| TIMER12 | 024C 0000h |
| TIMER13 | 024D 0000h |
| TIMER14 | 024E 0000h |
| TIMER15 | 024F 0000h |
| WKUP_TIMER0 | 2B10 0000h |
| WKUP_TIMER1 | 2B11 0000h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| SCHEME | BU | MODULE_ID | |||||
| R | R | R | |||||
| 1h | 1h | 0h | |||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| MODULE_ID | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RTL | MAJOR | ||||||
| R | R | ||||||
| 7h | 1h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CUSTOM | MINOR | ||||||
| R | R | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:30 | SCHEME | R | 1h | PID register scheme Reset Source: mod_g_rst_n |
| 29:28 | BU | R | 1h | Business Unit 1 Wireless BU 2 Processors BU |
| 27:16 | MODULE_ID | R | 0h | Module ID Reset Source: mod_g_rst_n |
| 15:11 | RTL | R | 7h | RTL revision. Will vary depending on release. Reset Source: mod_g_rst_n |
| 10:8 | MAJOR | R | 1h | Major revision Reset Source: mod_g_rst_n |
| 7:6 | CUSTOM | R | 0h | Custom Reset Source: mod_g_rst_n |
| 5:0 | MINOR | R | 0h | Minor revision Reset Source: mod_g_rst_n |