SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
CRC generate several types of interrupts per channel. Associated with each interrupt there is a interrupt enable bit (see MCRC64_0_CRC_INTS). No interrupt is generated in Full-CPU mode.
| CRC Mode | Compression Complete | CRC Fail | Overrun | Underrun | Timeout |
|---|---|---|---|---|---|
| AUTO | No | Yes | Yes | Yes | Yes |
| Semi-CPU | Yes | No | Yes | No | Yes |
| Full-CPU | No | No | No | No | No |