SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
| Offset | Length | Register Name | USB0 Physical Address |
|---|---|---|---|
| 0h | 32 | ECC_AGGR_REV | 0F98 0000h |
| 8h | 32 | ECC_AGGR_VECTOR | 0F98 0008h |
| Ch | 32 | ECC_AGGR_STAT | 0F98 000Ch |
| 10h | 32 | ECC_AGGR_RESERVED_SVBUS_J | 0F98 0010h + formula |
| 3Ch | 32 | ECC_AGGR_SEC_EOI_REG | 0F98 003Ch |
| 40h | 32 | ECC_AGGR_SEC_STATUS_REG0 | 0F98 0040h |
| 80h | 32 | ECC_AGGR_SEC_ENABLE_SET_REG0 | 0F98 0080h |
| C0h | 32 | ECC_AGGR_SEC_ENABLE_CLR_REG0 | 0F98 00C0h |
| 13Ch | 32 | ECC_AGGR_DED_EOI_REG | 0F98 013Ch |
| 140h | 32 | ECC_AGGR_DED_STATUS_REG0 | 0F98 0140h |
| 180h | 32 | ECC_AGGR_DED_ENABLE_SET_REG0 | 0F98 0180h |
| 1C0h | 32 | ECC_AGGR_DED_ENABLE_CLR_REG0 | 0F98 01C0h |
| 200h | 32 | ECC_AGGR_AGGR_ENABLE_SET | 0F98 0200h |
| 204h | 32 | ECC_AGGR_AGGR_ENABLE_CLR | 0F98 0204h |
| 208h | 32 | ECC_AGGR_AGGR_STATUS_SET | 0F98 0208h |
| 20Ch | 32 | ECC_AGGR_AGGR_STATUS_CLR | 0F98 020Ch |