SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
| Module Instance | Power Sleep Controller | Power Domain | Module Domain | Index | Default | Controllable | Dependencies |
|---|---|---|---|---|---|---|---|
| ATL0 | MAIN_PSC0 | GP_CORE | LPSC_MAIN_ATL | 37 | OFF | YES | LPSC_MAIN_IP0 |
| Module Instance | Source | Description |
|---|---|---|
| ATL0 | MAIN_PSC0 | ATL0 reset |
| Module Instance | Module Clock Input | Source Clock Signal | Source Control Register | Description |
|---|---|---|---|---|
| ATL0 | ATL_CLK | MAIN_PLL2_HSDIV8_CLKOUT | ATL_CLKSEL[2:0] | |
| MAIN_PLL1_HSDIV6_CLKOUT | ATL_CLKSEL[2:0] | |||
| MAIN_PLL2_HSDIV0_CLKOUT | ATL_CLKSEL[2:0] | |||
| MAIN_PLL4_HSDIV1_CLKOUT | ATL_CLKSEL[2:0] | |||
| MAIN_PLL0_HSDIV7_CLKOUT | ATL_CLKSEL[2:0] | |||
| MCU_EXT_REFCLK0 | ATL_CLKSEL[2:0] | |||
| EXT_REFCLK1 | ATL_CLKSEL[2:0] | |||
| VBUS_CLK | MAIN_SYSCLK0/2 |