The data flow for transmit channels is as follows:
- The DMA access for a particular DMA channel (DMA channel allocation table entry) is started when data buffer RAM has sufficient buffer space and the system memory buffer (ping or pong depending on the PG bit in DMA descriptor table entry) is marked as ready for a particular DMA channel allocation table entry. Each DMA channel allocation table entry corresponds to a DMA descriptor table entry as per the following mapping:
- Address of DMA descriptor table entry = 40h + Index of DMA channel allocation table entry.
- The DMA reads from the system memory address specified in the DMA descriptor table and writes to the data buffer RAM memory address specified by the BA field of the channel descriptor table entry. The CL field in the DMA channel allocation table entry is used to determine the appropriate channel descriptor table entry. Note that CL field of DMA channel allocation table and MLBSS channel allocation table entries must be the same, thus providing the common data buffer RAM address for DMA to write into MLBSS core and the MLBSS core to read from the DMA.
- Once the MLBSS is synchronized to
the incoming MediaLB framesync (MLB_MLBC0[7] MLBLK = 1h)MLB_MLBC0 and a MediaLB channel address is received, the MediaLB core
refers to the specific MediaLB channel allocation table entry and reads data
from the data buffer RAM buffer. The data buffer RAM address from which data is
read is the BA field of the channel descriptor table entry. The channel
descriptor table entry is specified by the CL field of the MLBSS channel
allocation table entry for the channel. The MediaLB channel allocation table
entry equals (1/2)*ChannelAddr.
- This data is serialized and transmitted through the MediaLB 3-pin or 6-pin interface.