SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Doorbell Offset Register For register definitions, refer to the xHCI specification.
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| Instance Name | Physical Address |
|---|---|
| USB0 | 3100 0014h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| DOORBELL_ARRAY_OFFSET | |||||||
| R | |||||||
| 158h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| DOORBELL_ARRAY_OFFSET | |||||||
| R | |||||||
| 158h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| DOORBELL_ARRAY_OFFSET | |||||||
| R | |||||||
| 158h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| DOORBELL_ARRAY_OFFSET | RESERVED_1_0 | ||||||
| R | R | ||||||
| 158h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:2 | DOORBELL_ARRAY_OFFSET | R | 158h | Doorbell Array Offset - RO Based on configuration, the controller automatically updates it. For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus [USB] Specification 3.0. Reset Source: rst_mod_g_rst_n |
| 1:0 | RESERVED_1_0 | R | 0h | Reserved |