| MCRC64_0 |
MCRC64_0_dma_event_[3:0] |
DMASS0_INTAGGR_0_intaggr_levi_pend_IN_28 |
DMASS0_INTAGGR_0 |
MCRC64_0 interrupt request |
pulse |
| MCRC64_0 |
MCRC64_0_dma_event_[3:0] |
DMASS0_INTAGGR_0_intaggr_levi_pend_IN_29 |
DMASS0_INTAGGR_0 |
MCRC64_0 interrupt request |
pulse |
| MCRC64_0 |
MCRC64_0_dma_event_[3:0] |
DMASS0_INTAGGR_0_intaggr_levi_pend_IN_30 |
DMASS0_INTAGGR_0 |
MCRC64_0 interrupt request |
pulse |
| MCRC64_0 |
MCRC64_0_dma_event_[3:0] |
DMASS0_INTAGGR_0_intaggr_levi_pend_IN_31 |
DMASS0_INTAGGR_0 |
MCRC64_0 interrupt request |
pulse |
| MCRC64_0 |
MCRC64_0_int_mcrc_0 |
C7X256V0_CLEC_gic_spi_IN_166 |
C7X256V0_CLEC |
MCRC64_0 interrupt request |
level |
| MCRC64_0 |
MCRC64_0_int_mcrc_0 |
C7X256V1_CLEC_gic_spi_IN_166 |
C7X256V1_CLEC |
MCRC64_0 interrupt request |
level |
| MCRC64_0 |
MCRC64_0_int_mcrc_0 |
DMASS0_INTAGGR_0_intaggr_levi_pend_IN_7 |
DMASS0_INTAGGR_0 |
MCRC64_0 interrupt request |
level |
| MCRC64_0 |
MCRC64_0_int_mcrc_0 |
R5FSS0_CORE0_intr_IN_119 |
R5FSS0_CORE0 |
MCRC64_0 interrupt request |
level |
| MCRC64_0 |
MCRC64_0_int_mcrc_0 |
R5FSS0_CORE1_intr_IN_119 |
R5FSS0_CORE1 |
MCRC64_0 interrupt request |
level |
| MCRC64_0 |
MCRC64_0_int_mcrc_0 |
R5FSS1_CORE0_intr_IN_119 |
R5FSS1_CORE0 |
MCRC64_0 interrupt request |
level |
| MCRC64_0 |
MCRC64_0_int_mcrc_0 |
R5FSS1_CORE1_intr_IN_119 |
R5FSS1_CORE1 |
MCRC64_0 interrupt request |
level |
| MCRC64_0 |
MCRC64_0_int_mcrc_0 |
WKUP_R5FSS0_CORE0_intr_IN_119 |
WKUP_R5FSS0_CORE0 |
MCRC64_0 interrupt request |
level |