SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
CTI Channel to Trigger Enable Register 7
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| Instance Name | Physical Address |
|---|---|
| DEBUGSS_WRAP0 | 0007 6000 10BCh |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | TRIGOUTEN | ||||||
| R | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:4 | RESERVED | R | 0h | Reserved, returns 0 |
| 3:0 | TRIGOUTEN | R/W | 0h | The CTI Channel to Trigger Enable Registers define which channels can generate a CTITRIGOUT output There is one register for each of the eight CTITRIGOUT outputs Within each register there is one bit for each of the four channels implemented These registers affect the mapping from application trigger to trigger outputs |