SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
For this combination the Tx Buffers section in the Message RAM is separated in two parts:
If MCAN_TXBC[29-24] TFQS field is empty (zero) - only Dedicated Tx Buffers are used.
Tx prioritization:
Figure 12-271 shows Mixed Dedicated Tx Buffers/Tx Queue example.
Figure 12-271 Mixed Dedicated Tx Buffers/Tx Queue (example)