SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
| Offset | Length | Register Name | PDMA4 Physical Address |
|---|---|---|---|
| 0h | 32 | ECC_AGGR_REV | 00C0 2000h |
| 8h | 32 | ECC_AGGR_VECTOR | 00C0 2008h |
| Ch | 32 | ECC_AGGR_STAT | 00C0 200Ch |
| 10h | 32 | ECC_AGGR_RESERVED_SVBUS_J | 00C0 2010h + formula |
| 3Ch | 32 | ECC_AGGR_SEC_EOI_REG | 00C0 203Ch |
| 40h | 32 | ECC_AGGR_SEC_STATUS_REG0 | 00C0 2040h |
| 80h | 32 | ECC_AGGR_SEC_ENABLE_SET_REG0 | 00C0 2080h |
| C0h | 32 | ECC_AGGR_SEC_ENABLE_CLR_REG0 | 00C0 20C0h |
| 13Ch | 32 | ECC_AGGR_DED_EOI_REG | 00C0 213Ch |
| 140h | 32 | ECC_AGGR_DED_STATUS_REG0 | 00C0 2140h |
| 180h | 32 | ECC_AGGR_DED_ENABLE_SET_REG0 | 00C0 2180h |
| 1C0h | 32 | ECC_AGGR_DED_ENABLE_CLR_REG0 | 00C0 21C0h |
| 200h | 32 | ECC_AGGR_AGGR_ENABLE_SET | 00C0 2200h |
| 204h | 32 | ECC_AGGR_AGGR_ENABLE_CLR | 00C0 2204h |
| 208h | 32 | ECC_AGGR_AGGR_STATUS_SET | 00C0 2208h |
| 20Ch | 32 | ECC_AGGR_AGGR_STATUS_CLR | 00C0 220Ch |