SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Reset Status shows the Reset Status functionality. An output pin or software bit is used to represent the status of a specific individual reset.
|
Reset Status Name |
Reset Status Source |
Reset Status Info |
Signal Active Level |
Reset Signal Details |
|---|---|---|---|---|
|
WKUP_CTRL_MMR1 Status Register |
Register |
4 bits in CTRLMMR on MCU warm reset status and assertion. |
Status bits read active HIGH (1) when a particular reset is asserted. |
|
|
WKUP_CTRL_MMR0 Status Register |
Register |
4 bits in CTRLMMR on WKUP warm reset status and assertion. |
Status bits read active HIGH (1) when a particular reset is asserted. |
|
|
PORz_OUTz |
Output Pin |
On/Off pin status of MAIN PORz reset |
Active LOW (0) |
MAIN_PORz_OUT Status Pin |
|
RESETSTATz |
Output Pin |
On/Off pin status of MAIN warm reset |
Active LOW (0) |
MAIN_RESETSTATzStatus Pin |
|
MCU_ERRORn |
Output Pin |
On/Off pin status of MCU ESM_ERROR reset |
Active LOW (0) |
MCU_SAFETY_ERRORn Status Pin |