SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
| Offset | Length | Register Name | WKUP_R5FSS0_COMMON0 Physical Address |
|---|---|---|---|
| 0h | 32 | ECC_AGGR_REV | 3F00 D000h |
| 8h | 32 | ECC_AGGR_VECTOR | 3F00 D008h |
| Ch | 32 | ECC_AGGR_STAT | 3F00 D00Ch |
| 10h | 32 | ECC_AGGR_RESERVED_SVBUS_J | 3F00 D010h + formula |
| 3Ch | 32 | ECC_AGGR_SEC_EOI_REG | 3F00 D03Ch |
| 40h | 32 | ECC_AGGR_SEC_STATUS_REG0 | 3F00 D040h |
| 80h | 32 | ECC_AGGR_SEC_ENABLE_SET_REG0 | 3F00 D080h |
| C0h | 32 | ECC_AGGR_SEC_ENABLE_CLR_REG0 | 3F00 D0C0h |
| 13Ch | 32 | ECC_AGGR_DED_EOI_REG | 3F00 D13Ch |
| 140h | 32 | ECC_AGGR_DED_STATUS_REG0 | 3F00 D140h |
| 180h | 32 | ECC_AGGR_DED_ENABLE_SET_REG0 | 3F00 D180h |
| 1C0h | 32 | ECC_AGGR_DED_ENABLE_CLR_REG0 | 3F00 D1C0h |
| 200h | 32 | ECC_AGGR_AGGR_ENABLE_SET | 3F00 D200h |
| 204h | 32 | ECC_AGGR_AGGR_ENABLE_CLR | 3F00 D204h |
| 208h | 32 | ECC_AGGR_AGGR_STATUS_SET | 3F00 D208h |
| 20Ch | 32 | ECC_AGGR_AGGR_STATUS_CLR | 3F00 D20Ch |