SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The emulation control input (EMUSUSP) and submodule emulation control registers allow CPSW operation to be completely or partially suspended. Each Ethernet port has associated emulation control registers (CPSW3_CPSW_NU_EM_CONTROL_REG and CPSW3_CPSW_NU_CPSW_NU_ETH_MAC_i_PN_MAC_EMCONTROL_REG). The submodule emulation control registers must be accessed to facilitate CPSW emulation control. The CPSW module enters the emulation suspend state if all three submodules are configured for emulation suspend and the emulation suspend input is asserted. A partial emulation suspend state is entered if one or two submodules is configured for emulation suspend and the emulation suspend input is asserted. Emulation suspend occurs at packet boundaries. The emulation control feature is implemented for compatibility with other peripherals.
Ethernet port Emulation Control
The emulation control input (TBEMUSUP) and register bits (SOFT and FREE bits in the CPSW3_CPSW_NU_CPSW_NU_ETH_MAC_i_PN_MAC_EMCONTROL_REG register) allow Ethernet port operation to be suspended. When the emulation suspend state is entered, the Ethernet port will stop processing receive and transmit frames at the next frame boundary. Any frame currently in reception or transmission will be completed normally without suspension. For receive, frames that are detected by the Ethernet port after the suspend state is entered are ignored.
Table 12-208 shows the operations of the emulation control input and register bits.
| EMUSUSP | SOFT | FREE | Description |
|---|---|---|---|
| 0 | X | X | Normal Operation |
| 1 | 0 | 0 | Normal Operation |
| 1 | 1 | 0 | Emulation Suspend |
| 1 | X | 1 | Normal Operation |