SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Action Qualifier Software Force Register
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| Instance Name | Physical Address |
|---|---|
| EPWM0 | 2300 001Ah |
| EPWM1 | 2301 001Ah |
| EPWM2 | 2302 001Ah |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED1 | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RLDCSF | OTSFB | ACTSFB | OTSFA | ACTSFA | |||
| R/W | R/W1TC | R/W | R/W1TC | R/W | |||
| 0h | 0h | 0h | 0h | 0h | |||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15:8 | RESERVED1 | R | 0h | Reserved |
| 7:6 | RLDCSF | R/W | 0h | AQCSFRC Active Register Reload From Shadow Options |
| 5 | OTSFB | R/W1TC | 0h | One-Time Software Forced Event on Output B 0h Writing a 0h ( 1h Initiates a single s/w forced event |
| 4:3 | ACTSFB | R/W | 0h | Action when One-Time Software Force B Is invoked 0h Does nothing (action disabled) 1h Clear (low) 2h Set (high) 3h Toggle (Low -> High, High -> Low). |
| 2 | OTSFA | R/W1TC | 0h | One-Time Software Forced Event on Output A 0h Writing a 0 (zero) has no effect. Always
reads back a 0. This bit is auto cleared
once a write to this register is complete
(that is, a forced event is initiated).
1h Initiates a single software forced event. |
| 1:0 | ACTSFA | R/W | 0h | Action When One-Time Software Force A Is Invoked 0h Does nothing (action disabled). 1h Clear (low). 2h Set (high). 3h Toggle (Low -> High, High -> Low). |