Select peripherals support a debug feature that allows them to react to the debug state of a controlling processor. For instance, a timer peripheral that is allocated to a particular processor could be configured to stop counting when the associated processor is in the halted state. This device includes programmable support for shared peripherals that allows the developer to select the processor whose debug state a given peripheral should receive Peripherals that are debug aware include programmable support to enable or disable sensitivity to debug.
A list of the processors and peripherals that support this debug model can be found below.
- Supported Processors
- C7XSS0
- C7XSS1
- MAIN_R5FSS0
- MAIN_R5FSS1
- WKUP_R5F
- SMS0_HSM
- Supported Peripherals
- GTC
- CPSW3G
- DMSS
- SA3SS
- TIMER Instances
- EPWM Instances
- MCAN Instances
- I2C Instances
- ECAP Instances
- PDAM_AASRC
- PDMA_SPI
- PDMA_UART
- PDMA_MCASP
- RTI/WWDT Instances