SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
This register can be read to determine the number of suspend signals and number of peripherals.
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| Instance Name | Physical Address |
|---|---|
| DEBUGSS_WRAP0 | 0007 6000 2008h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | NUM_SUSPENDS | ||||||
| R | R | ||||||
| 0h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| NUM_PERIPHERALS | |||||||
| R | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:14 | RESERVED | R | 0h | Reserved, returns 0 |
| 13:8 | NUM_SUSPENDS | R | 0h | Contains the number of Suspend signals supported, max of 32 There should be one signal per processor This value is set by a parameter at synthesis time |
| 7:0 | NUM_PERIPHERALS | R | 0h | Contains the number of peripherals supported, max of 128 This affects the number of SUSPEND_REG registers This is set by a parameter during synthesis |