SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
In stream mode, data transfer for channel number N is shown in ASRC Stream Mode Audio Data Write for Channel N and ASRC Stream Mode AUdio Data Read for Channel N.
Figure 12-4 ASRC Stream Mode Audio Data Write for Channel N
Figure 12-5 ASRC Stream Mode Audio Data Read for Channel NIt is not required for the device EDMA to service an event in one cycle, as it may be busy with other transfers also. If EDMA channel is shared between more than one channels, then it can queue the events and service whenever it has the resources available.
For each infifo_evt[N], that is infifo event for channel N, ASRC ensures that there is space available for at least INFIFO_THRESHOLD number of samples in the INFIFO of that channel. This INFIFO_THRESHOLD value can be set in ASRC_SRCFFCTRL_0[7:0] INFIFO_THRESHOLD register bitfield of that channel.
For each outfifo_evt[N], that is outfifo event for channel N, ASRC ensures that there is at least OUTFIFO_THRESHOLD number of samples available in OUTFIFO of that channel. This OUTFIFO_THRESHOLD value can be set in ASRC_SRCFFCTRL_0[23:16] OUTFIFO_THRESHOLD register bitfield of that channel.