SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The following sections describe different power modes of the device. Specific values are detailed in the device-specific data sheet. Note that not all modes are supported by software packages supplied by Texas Instruments.
| Low Power Modes | Wakeup Sources | Application State and Use Case |
|---|---|---|
| IORET | External IO activities | The entire SoC is OFF except I/O pins in CANUART I/O Bank to maintain I/O wakeup capability. Contents in a bank of SRAM (RAM Retention) is preserved during this low power mode. |
| Standby | Any SoC interrupt event |
On-chip contents are fully preserved. Any SoC interrupt event can cause a wakeup event from this low power mode. Cores are in WFI The device can run low-level processing with non-Wakeup domain peripherals and support wakeup from those peripherals. |