SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
A total of 8 source channels are provided within the DMA for concurrent transfers from the various attached peripherals into the Rx per channel buffers and on to the PSI-L Rx Interface. Each Rx channel requires a single PSI-L thread. The Rx channels are allocated as follows.
| Rx DMA Channel | Function | Channel Type | Trigger Type | Stream FIFO Address | Group FIFO Address |
|---|---|---|---|---|---|
| 0 | ASRC0 Rx Ch 0 | ASRC | pulse | 000002D21000 | 000002D10080 |
| ASRC1 Rx Ch 0 | ASRC | pulse | 000002D61000 | 000002D50080 | |
| 1 | ASRC0 Rx Ch 1 | ASRC | pulse | 000002D21000 | 000002D10080 |
| ASRC1 Rx Ch 1 | ASRC | pulse | 000002D61000 | 000002D50080 | |
| 2 | ASRC0 Rx Ch 2 | ASRC | pulse | 000002D21000 | 000002D10080 |
| ASRC1 Rx Ch 2 | ASRC | pulse | 000002D61000 | 000002D50080 | |
| 3 | ASRC0 Rx Ch 3 | ASRC | pulse | 000002D21000 | 000002D10080 |
| ASRC1 Rx Ch 3 | ASRC | pulse | 000002D61000 | 000002D50080 | |
| 4 | ASRC0 Rx Ch 4 | ASRC | pulse | 000002D21000 | 000002D10080 |
| ASRC1 Rx Ch 4 | ASRC | pulse | 000002D61000 | 000002D50080 | |
| 5 | ASRC0 Rx Ch 5 | ASRC | pulse | 000002D21000 | 000002D10080 |
| ASRC1 Rx Ch 5 | ASRC | pulse | 000002D61000 | 000002D50080 | |
| 6 | ASRC0 Rx Ch 6 | ASRC | pulse | 000002D21000 | 000002D10080 |
| ASRC1 Rx Ch 6 | ASRC | pulse | 000002D61000 | 000002D50080 | |
| 7 | ASRC0 Rx Ch 7 | ASRC | pulse | 000002D21000 | 000002D10080 |
| ASRC1 Rx Ch 7 | ASRC | pulse | 000002D61000 | 000002D50080 |