SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
This register is used to program the SD Bus power and voltage level
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| Instance Name | Physical Address |
|---|---|
| MMCSD0 | 0FA0 0029h |
| 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 |
| 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 |
| UHS2_VOLTAGE | UHS2_POWER | SD_BUS_VOLTAGE | SD_BUS_POWER | ||||
| R/W | R/W | R/W | R/W | ||||
| 0h | 0h | 0h | 0h | ||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7:5 | UHS2_VOLTAGE | R/W | 0h | This field determines supply voltage range to VDD2. This field can be set to 101b if 1.8V VDD2 Support in the Capabilities register is set to 1. '000' VDD2 Not supported '001'- '011' Reserved '100' Reserved for 1.2V '101' 1.8V '110' Not Used '111' Not Used Reset Source: vbus_amod_g_rst_n |
| 4 | UHS2_POWER | R/W | 0h |
Setting this bit enables providing VDD2.
'0' Power Off
'1' Power On
1 Power On 0 Power Off |
| 3:1 | SD_BUS_VOLTAGE | R/W | 0h |
By setting these bits, the HD selects the voltage level for the SD card. Before setting this register, the HD shall check the voltage support bits in the capabilities register. If an unsupported voltage is selected, the Host System shall not supply SD bus voltage.
'000'- '100' Reserved
'101' 1.8V
'110' 3.0V
'111' 3.3V
7 6 5 0 |
| 0 | SD_BUS_POWER | R/W | 0h |
Before setting this bit, the SD host driver shall set SD Bus Voltage Select. If the HC detects the No Card State, this bit shall be cleared.
If this bit is cleared, the Host Control-ler should immediately stop driving CMD and DAT[3:0] [tri-state], and drive SDCLK to low level [Refer to Section 2.2.14]. If card is connectedto Host Controller, Host Controller shall set these lines to low before stopping to supply VDD1.In UHS-II mode, before clearing this bit, Host Driver shall clear SD Clock Enable and before stopping to sup-ply VDD1, Host Controller shall set
DAT[2] to low if DAT[2] is used as out-of band interrupt.
1 Power On 0 Power Off |