SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
ECC Vector Register
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| Instance Name | Physical Address |
|---|---|
| WKUP_R5FSS0_COMMON0 | 3F00 D008h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | RD_SVBUS_DONE | ||||||
| NONE | R/W1TC | ||||||
| 0h | 0h | ||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RD_SVBUS_ADDRESS | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RD_SVBUS | RESERVED | ECC_VECTOR | |||||
| R/W1TS | NONE | R/W | |||||
| 0h | 0h | 0h | |||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| ECC_VECTOR | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:25 | RESERVED | NONE | 0h | Reserved |
| 24 | RD_SVBUS_DONE | R/W1TC | 0h | Status to indicate if read on serial VBUS is complete, write of any value will clear this bit. |
| 23:16 | RD_SVBUS_ADDRESS | R/W | 0h | Read address |
| 15 | RD_SVBUS | R/W1TS | 0h | Write 1 to trigger a read on the serial VBUS |
| 14:11 | RESERVED | NONE | 0h | Reserved |
| 10:0 | ECC_VECTOR | R/W | 0h | Value written to select the corresponding ECC RAM for control or status |