SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The Revision Register contains the major and minor revisions for the module.
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| Instance Name | Physical Address |
|---|---|
| FSS1_OSPI_0 | 0FCC 4000h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| SCHEME | BU | MODULE_ID | |||||
| R | R | R | |||||
| 1h | 2h | 874h | |||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| MODULE_ID | |||||||
| R | |||||||
| 874h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RTL | MAJOR | ||||||
| R | R | ||||||
| Fh | 1h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CUSTOM | MINOR | ||||||
| R | R | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:30 | SCHEME | R | 1h | PID register scheme Reset Source: psrst_n |
| 29:28 | BU | R | 2h | Business Unit: 10 = Processors Reset Source: psrst_n |
| 27:16 | MODULE_ID | R | 874h | Module ID Reset Source: psrst_n |
| 15:11 | RTL | R | Fh | RTL revision. Will vary depending on release. Reset Source: psrst_n |
| 10:8 | MAJOR | R | 1h | Major revision Reset Source: psrst_n |
| 7:6 | CUSTOM | R | 0h | Custom Reset Source: psrst_n |
| 5:0 | MINOR | R | 0h | Minor revision Reset Source: psrst_n |