SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
PLL_SS_CTRL register for pll14
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| Instance Name | Physical Address |
|---|---|
| PLL0 | 0068 E040h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| BYPASS_EN | RESERVED | WV_TBLE_MAXADDR | |||||
| R/W | NONE | R/W | |||||
| 1h | 0h | 0h | |||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| WV_TBLE_MAXADDR | RESERVED | ||||||
| R/W | NONE | ||||||
| 0h | 0h | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESET | RESERVED | ||||||
| R/W | NONE | ||||||
| 0h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | DOWNSPREAD_EN | RESERVED | WAVE_SEL | ||||
| NONE | R/W | NONE | R/W | ||||
| 0h | 0h | 0h | 0h | ||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31 | BYPASS_EN | R/W | 1h | Bypass the SS modulator. 1'b0 - Spread spectrum modulation is enabled 1'b1 - SSMOD is bypassed. No modulation of PLL frequency Reset Source: sys_por_arst_rst_n |
| 30:26 | RESERVED | NONE | 0h | Reserved |
| 25:18 | WV_TBLE_MAXADDR | R/W | 0h | Wave table max address. Indicates the maximum number of address bits used to access the external wave table. These bits are not used if PLL_CFG_ssm_wvtbl = 0 Reset Source: sys_por_arst_rst_n |
| 17:16 | RESERVED | NONE | 0h | Reserved |
| 15 | RESET | R/W | 0h | SSM reset. When set to 1 the SSM modulator is in reset Reset Source: sys_por_arst_rst_n |
| 14:5 | RESERVED | NONE | 0h | Reserved |
| 4 | DOWNSPREAD_EN | R/W | 0h | Selects center spread or down spread clock variance 1'b0 - Center spread 1'b1 - Down spread Reset Source: sys_por_arst_rst_n |
| 3:1 | RESERVED | NONE | 0h | Reserved |
| 0 | WAVE_SEL | R/W | 0h | Wave pattern select External wave table should only be selected if PLL_CFG_ssm_wvtbl = 1 Field values (Others are reserved): 1'b0 - Use 128 point triangle wave table 1'b1 - Use external wave table Reset Source: sys_por_arst_rst_n |