SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
PLL4_CAL_CTRL - PLL4 Calibration Control Register
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| Instance Name | Physical Address |
|---|---|
| PLL0 | 0068 4060h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| CAL_EN | RESERVED | ||||||
| R/W | NONE | ||||||
| 0h | 0h | ||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | FAST_CAL | RESERVED | CAL_CNT | ||||
| NONE | R/W | NONE | R/W | ||||
| 0h | 0h | 0h | 2h | ||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| CAL_BYP | RESERVED | CAL_IN | |||||
| R/W | NONE | R/W | |||||
| 0h | 0h | 0h | |||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CAL_IN | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31 | CAL_EN | R/W | 0h | Calibration enable to actively adjust for input skew 1'b0 - Disabled. Static phase offset determined by analog matching only 1'b1 - Enabled. Static phase offset adjusted by phase sensing at input Reset Source: sys_por_arst_rst_n |
| 30:21 | RESERVED | NONE | 0h | Reserved |
| 20 | FAST_CAL | R/W | 0h | Fast calibration enabled 1'b0 - Normal operation 1'b1 - Used for initial calibration if initial value is not already known Reset Source: sys_por_arst_rst_n |
| 19 | RESERVED | NONE | 0h | Reserved |
| 18:16 | CAL_CNT | R/W | 2h | Calibration loop programmable counter. Selects the number of PFD edges to wait after each calibration step defined by 2**cal_cnt Reset Source: sys_por_arst_rst_n |
| 15 | CAL_BYP | R/W | 0h | Calibration bypass 1'b0 - Use the calibration output to set the phase correction 1'b1 - Use the cal_in input value to set the phase correction Reset Source: sys_por_arst_rst_n |
| 14:12 | RESERVED | NONE | 0h | Reserved |
| 11:0 | CAL_IN | R/W | 0h | Calibration input When cal_byp is 1'b0, this represents the initial condition for calibration. When cal_byp is 1'b1, this is the override value for calibration. Value is a signed integer with positive values delaying the faster path reset and negative values delaying the slower path reset. Reset Source: sys_por_arst_rst_n |