SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Register containing low power mode wakeup enables
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| USB0 | 0F90 0030h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RSVD1 | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RSVD1 | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RSVD1 | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RSVD1 | OVERCURRENT_WAKEUP_EN | LINESTATE_WAKEUP_EN | SESSVALID_WAKEUP_EN | VBUSVALID_WAKEUP_EN | |||
| R | R/W | R/W | R/W | R/W | |||
| 0h | 0h | 0h | 0h | 0h | |||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:4 | RSVD1 | R | 0h | Reserved bits Reset Source: cfg_srst_n |
| 3 | OVERCURRENT_WAKEUP_EN | R/W | 0h | overcurrent event wakeup enable Reset Source: cfg_srst_n |
| 2 | LINESTATE_WAKEUP_EN | R/W | 0h | linestate event wakeup enable Reset Source: cfg_srst_n |
| 1 | SESSVALID_WAKEUP_EN | R/W | 0h | SESSVALID event wakeup enable Reset Source: cfg_srst_n |
| 0 | VBUSVALID_WAKEUP_EN | R/W | 0h | VBUSVALID event wakeup enable Reset Source: cfg_srst_n |