SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Status of RX/TX FIFOs empty corresponding interrupts.
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| UART0 | 0280 0070h |
| UART1 | 0281 0070h |
| UART2 | 0282 0070h |
| UART3 | 0283 0070h |
| UART4 | 0284 0070h |
| UART5 | 0285 0070h |
| UART6 | 0286 0070h |
| WKUP_UART0 | 2B30 0070h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED1 | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED1 | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED1 | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | TXFIFO_EMPTY_STS | RXFIFO_EMPTY_STS | |||||
| R | R/W1TC | R/W1TC | |||||
| 0h | 1h | 1h | |||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:8 | RESERVED1 | R | 0h | |
| 7:2 | RESERVED | R | 0h | |
| 1 | TXFIFO_EMPTY_STS | R/W1TC | 1h | TXFIFO interrupt pending 0 TXFIFO_EMPTY interrupt not pending. 1 TXFIFO_EMPTY interrupt pending. |
| 0 | RXFIFO_EMPTY_STS | R/W1TC | 1h | RXFIFO interrupt pending 0 RXFIFO_EMPTY interrupt not pending. 1 RXFIFO_EMPTY interrupt pending. |