SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Shows the Error and Self test Status of the CPU CPU Compare block.
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| Instance Name | Physical Address |
|---|---|
| R5FSS0_COMMON0 | 05B0 0008h |
| R5FSS1_COMMON0 | 05B2 0008h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED2 | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED2 | CMPE2 | ||||||
| R | R/W | ||||||
| 0h | 0h | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED1 | STC2 | ||||||
| R | R | ||||||
| 0h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED0 | STET2 | STE2 | |||||
| R | R | R | |||||
| 0h | 0h | 0h | |||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:17 | RESERVED2 | R | 0h | This is the Reserved field |
| 16 | CMPE2 | R/W | 0h | This is the CMPE2 field Reset Source: mod_g_rst_n |
| 15:9 | RESERVED1 | R | 0h | This is the Reserved field |
| 8 | STC2 | R | 0h | This is the STC2 field Reset Source: mod_g_rst_n |
| 7:2 | RESERVED0 | R | 0h | This is the Reserved field |
| 1 | STET2 | R | 0h | This is the STET2 field Reset Source: mod_g_rst_n |
| 0 | STE2 | R | 0h | This is the STE2 field Reset Source: mod_g_rst_n |