SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The receive format unit bit mask register (RMASK) determines which bits of the received data are masked off and padded with a known value before being read by the CPU or DMA.
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| MCASP0 | 02B0 0064h |
| MCASP1 | 02B1 0064h |
| MCASP2 | 02B2 0064h |
| MCASP3 | 02B3 0064h |
| MCASP4 | 02B4 0064h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RMASK | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RMASK | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RMASK | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RMASK | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:0 | RMASK | R/W | 0h | Receive data mask n enable bit. 0 Corresponding bit of receive data (after
passing through reverse and rotate units)
is masked out and then padded with the
selected bit pad value (RPAD and RPBIT bits
in RFMT).
1 Corresponding bit of receive data (after
passing through reverse and rotate units)
is returned to CPU or DMA. |