SPRUJC6 User guide

SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1

14.7.1.1.2.20 AASRC_CFG_ERROR_INTERRUPT_STATUS_RAW_REGISTER Register

1.2.20.1 AASRC_CFG_ERROR_INTERRUPT_STATUS_RAW_REGISTER Register (Offset = 64h) [reset = 0h]

This register contains the raw interrupt status as defined in HL0.8 for the Error interrupts. A read of the Interrupt Status Raw / Set Register returns the current pending status of the interrupt sources with no regard to any enable settings. A write to this register sets the interrupt pending status of each interrupt source whose corresponding bit is 1 in the value written. Note that reading this register immediately after writing to it would reflect old value instead of the written value; wait for 2 system clock cycles after writing to read written value.

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Table 14-10691 Instance Table

Instance Name	Physical Address
AASRC0	02D0 0064h
AASRC1	02D4 0064h

Figure 14-5296 AASRC_CFG_ERROR_INTERRUPT_STATUS_RAW_REGISTER Name Register

31	30	29	28	27	26	25	24
RESERVED
R
0h
23	22	21	20	19	18	17	16
RESERVED
R
0h
15	14	13	12	11	10	9	8
CHANNEL_15_ERROR_RAW	CHANNEL_14_ERROR_RAW	CHANNEL_13_ERROR_RAW	CHANNEL_12_ERROR_RAW	CHANNEL_11_ERROR_RAW	CHANNEL_10_ERROR_RAW	CHANNEL_9_ERROR_RAW	CHANNEL_8_ERROR_RAW
R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
0h	0h	0h	0h	0h	0h	0h	0h
7	6	5	4	3	2	1	0
CHANNEL_7_ERROR_RAW	CHANNEL_6_ERROR_RAW	CHANNEL_5_ERROR_RAW	CHANNEL_4_ERROR_RAW	CHANNEL_3_ERROR_RAW	CHANNEL_2_ERROR_RAW	CHANNEL_1_ERROR_RAW	CHANNEL_0_ERROR_RAW
R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
0h	0h	0h	0h	0h	0h	0h	0h

Table 14-10692 AASRC_CFG_ERROR_INTERRUPT_STATUS_RAW_REGISTER Register Field Descriptions

Bit	Field	Type	Reset	Description
31:16	RESERVED	R	0h	Always read as 0
15	CHANNEL_15_ERROR_RAW	R/W	0h	Channel 15 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
14	CHANNEL_14_ERROR_RAW	R/W	0h	Channel 14 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
13	CHANNEL_13_ERROR_RAW	R/W	0h	Channel 13 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
12	CHANNEL_12_ERROR_RAW	R/W	0h	Channel 12 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
11	CHANNEL_11_ERROR_RAW	R/W	0h	Channel 11 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
10	CHANNEL_10_ERROR_RAW	R/W	0h	Channel 10 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
9	CHANNEL_9_ERROR_RAW	R/W	0h	Channel 9 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
8	CHANNEL_8_ERROR_RAW	R/W	0h	Channel 8 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
7	CHANNEL_7_ERROR_RAW	R/W	0h	Channel 7 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
6	CHANNEL_6_ERROR_RAW	R/W	0h	Channel 6 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
5	CHANNEL_5_ERROR_RAW	R/W	0h	Channel 5 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
4	CHANNEL_4_ERROR_RAW	R/W	0h	Channel 4 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
3	CHANNEL_3_ERROR_RAW	R/W	0h	Channel 3 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
2	CHANNEL_2_ERROR_RAW	R/W	0h	Channel 2 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
1	CHANNEL_1_ERROR_RAW	R/W	0h	Channel 1 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active
0	CHANNEL_0_ERROR_RAW	R/W	0h	Channel 0 FIFOs Error Interrupt Read indicates raw status. This fires when the FIFOs for this Channel isUnderflowed/Overflowed. Writing 1 will set status and Writing 0 has no effect 0 Status inactive 1 Status active