SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
This register contains the enabled interrupt status as defined in HL0.8 for the Output Group. A read of the Interrupt Status Register returns the current pending status of the interrupt sources as masked by the current enable flag for each of those sources. A write to this register clears the interrupt pending status of each interrupt source whose corresponding bit is 1 in the value written
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| Instance Name | Physical Address |
|---|---|
| AASRC0 | 02D0 0058h |
| AASRC1 | 02D4 0058h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | GROUP_3_OUTPUT_FIFO_THRESHOLD_ENABLED | GROUP_2_OUTPUT_FIFO_THRESHOLD_ENABLED | GROUP_1_OUTPUT_FIFO_THRESHOLD_ENABLED | GROUP_0_OUTPUT_FIFO_THRESHOLD_ENABLED | |||
| R | R/W1TC | R/W1TC | R/W1TC | R/W1TC | |||
| 0h | 0h | 0h | 0h | 0h | |||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:4 | RESERVED | R | 0h | Always read as 0 |
| 3 | GROUP_3_OUTPUT_FIFO_THRESHOLD_ENABLED | R/W1TC | 0h | Group 3 Output FIFO Threshold Interrupt Read indicates enabled status. This fires when all the Output FIFOs for this Group is above the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active |
| 2 | GROUP_2_OUTPUT_FIFO_THRESHOLD_ENABLED | R/W1TC | 0h | Group 2 Output FIFO Threshold Interrupt Read indicates enabled status. This fires when all the Output FIFOs for this Group is above the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active |
| 1 | GROUP_1_OUTPUT_FIFO_THRESHOLD_ENABLED | R/W1TC | 0h | Group 1 Output FIFO Threshold Interrupt Read indicates enabled status. This fires when all the Output FIFOs for this Group is above the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active |
| 0 | GROUP_0_OUTPUT_FIFO_THRESHOLD_ENABLED | R/W1TC | 0h | Group 0 Output FIFO Threshold Interrupt Read indicates enabled status. This fires when all the Output FIFOs for this Group is above the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active |