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SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1

14.7.1.1.2.5 AASRC_CFG_INPUT_FIFO_INTERRUPT_STATUS_ENABLED_REGISTER Register

1.2.5.1 AASRC_CFG_INPUT_FIFO_INTERRUPT_STATUS_ENABLED_REGISTER Register (Offset = 28h) [reset = 0h]

This register contains the enabled interrupt status as defined in HL0.8 for the Input FIFO for each Channel. A read of the Interrupt Status Register returns the current pending status of the interrupt sources as masked by the current enable flag for each of those sources. A write to this register clears the interrupt pending status of each interrupt source whose corresponding bit is 1 in the value written

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Table 14-10661 Instance Table

Instance Name	Physical Address
AASRC0	02D0 0028h
AASRC1	02D4 0028h

Figure 14-5281 AASRC_CFG_INPUT_FIFO_INTERRUPT_STATUS_ENABLED_REGISTER Name Register

31	30	29	28	27	26	25	24
RESERVED
R
0h
23	22	21	20	19	18	17	16
RESERVED
R
0h
15	14	13	12	11	10	9	8
CHANNEL_15_INPUT_FIFO_THRESHOLD_ENABLED	CHANNEL_14_INPUT_FIFO_THRESHOLD_ENABLED	CHANNEL_13_INPUT_FIFO_THRESHOLD_ENABLED	CHANNEL_12_INPUT_FIFO_THRESHOLD_ENABLED	CHANNEL_11_INPUT_FIFO_THRESHOLD_ENABLED	CHANNEL_10_INPUT_FIFO_THRESHOLD_ENABLED	CHANNEL_9_INPUT_FIFO_THRESHOLD_ENABLED	CHANNEL_8_INPUT_FIFO_THRESHOLD_ENABLED
R/W1TC	R/W1TC	R/W1TC	R/W1TC	R/W1TC	R/W1TC	R/W1TC	R/W1TC
0h	0h	0h	0h	0h	0h	0h	0h
7	6	5	4	3	2	1	0
CHANNEL_7_INPUT_FIFO_THRESHOLD_ENABLED	CHANNEL_6_INPUT_FIFO_THRESHOLD_ENABLED	CHANNEL_5_INPUT_FIFO_THRESHOLD_ENABLED	CHANNEL_4_INPUT_FIFO_THRESHOLD_ENABLED	CHANNEL_3_INPUT_FIFO_THRESHOLD_ENABLED	CHANNEL_2_INPUT_FIFO_THRESHOLD_ENABLED	CHANNEL_1_INPUT_FIFO_THRESHOLD_ENABLED	CHANNEL_0_INPUT_FIFO_THRESHOLD_ENABLED
R/W1TC	R/W1TC	R/W1TC	R/W1TC	R/W1TC	R/W1TC	R/W1TC	R/W1TC
0h	0h	0h	0h	0h	0h	0h	0h

Table 14-10662 AASRC_CFG_INPUT_FIFO_INTERRUPT_STATUS_ENABLED_REGISTER Register Field Descriptions

Bit	Field	Type	Reset	Description
31:16	RESERVED	R	0h	Always read as 0
15	CHANNEL_15_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 15 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
14	CHANNEL_14_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 14 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
13	CHANNEL_13_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 13 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
12	CHANNEL_12_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 12 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
11	CHANNEL_11_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 11 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
10	CHANNEL_10_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 10 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
9	CHANNEL_9_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 9 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
8	CHANNEL_8_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 8 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
7	CHANNEL_7_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 7 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
6	CHANNEL_6_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 6 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
5	CHANNEL_5_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 5 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
4	CHANNEL_4_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 4 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
3	CHANNEL_3_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 3 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
2	CHANNEL_2_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 2 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
1	CHANNEL_1_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 1 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active
0	CHANNEL_0_INPUT_FIFO_THRESHOLD_ENABLED	R/W1TC	0h	Channel 0 Input FIFO Threshold Interrupt Read indicates enabled status. This fires when the Input FIFO for this Channel is below the level set in the Configuration register. Writing 1 will clear status and Writing 0 has no effect 0 Status inactive 1 Status active