SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The ETL Count register is read by software to determine how many times the event message has been received. This register can be written to decrement the count by a specified amount to acknowledge that a count has been processed by the host.
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| Instance Name | Physical Address |
|---|---|
| DMASS0_INTAGGR_0 | 4A00 0000h + formula |
| 63 | 62 | 61 | 60 | 59 | 58 | 57 | 48 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| CCNT | |||||||
| R/WTD | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CCNT | |||||||
| R/WTD | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 63:32 | RESERVED | NONE | 0h | Reserved |
| 31:0 | CCNT | R/WTD | 0h | Current count. This field is incremented by the event count for each message received with this event on the Counted ETL Interface. On write, this field will be decremented by the value written. Writing a value greater than the current count is illegal. Reset Source: srst_n |