SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
The Ring N Occupancy Register can be read by software to determine the total number of valid entries on a ring. The contents of each of these registers are unary ORed in order to create a pending signal for the ring which can be used for triggering hardware operations and/or for generating interrupts to the host.
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| Instance Name | Physical Address |
|---|---|
| DMASS0_BCDMA_0 | 4BC0 1018h + formula |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| TDOWN_COMPLETE | RESERVED | ||||||
| R/NA | NONE | ||||||
| 0h | 0h | ||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | OCC | ||||||
| NONE | R/NA | ||||||
| 0h | 0h | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| OCC | |||||||
| R/NA | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| OCC | |||||||
| R/NA | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31 | TDOWN_COMPLETE | R/NA | 0h | This bit when set indicates that a teardown is complete on the channel. This bit is cleared anytime the tdown_ack bit is written as a 1 in the corresponding Ring N Doorbell Register. This bit is only valid on the reverse rings (rings consumed by the Host SW). Reset Source: rst_mod_g_rst_n |
| 30:17 | RESERVED | NONE | 0h | Reserved |
| 16:0 | OCC | R/NA | 0h | Total number of valid entries on the ring. This value is generally intended to be incremented by doorbell pokes from software and is decremented by the DMA engine as entries are completed. Reset Source: rst_mod_g_rst_n |